8902–A
3-PHASE BRUSHLESS DC
MOTOR CONTROLLER/DRIVER
Adaptive Commutation Delay. The
adaptive commutation delay circuit uses the
back-EMF zero-crossing indicator signal
(FCOM) to determine an optimal commuta-
tion time for efficient synchronous operation.
This circuit commutates the outputs, delayed
from the last zero crossing, using two
Blanking and Watchdog Timing Functions. The blanking and
watchdog timing functions are derived from one timing capacitor, CWD
VTL x CWD
.
where
tBLANK =
ICWD
VTH x CWD
=
ICWD
and
tWD
external timing capacitors, CD1 and CD2,
The CWD capacitor begins charging at each commutation, initiating
the BLANK signal. BLANK is an internal signal that inhibits the back-
EMF comparators during the commutation transients, preventing errors
due to inductive recovery and voltage settling transients.
t
FCOM
FCOM
The watchdog timing function allows time to detect correct motor
position by checking the back-EMF polarity after each commutation. If
the correct polarity is not observed between tBLANK and tWD, then the
watchdog timer commutates the outputs to the next state to synchro-
nize the motor. This function is useful in preventing excessive reverse
rotation, and helps in resynchronizing (or starting) with a moving
spindle.
V
CWD
t
CD1
V
CD1
t
CD2
V
TL
V
CWD
V
CD2
t
BLANK
BLANK
Dwg. WP-016-2
Dwg. WP-022
to measure the time between crossings.
ICD(charge)
NORMAL COMMUTATION
where
tCD = tFCOM x
ICD(discharge)
CD1 charges up with a fixed current from
its 2.5 V reference while FCOM is high.
When FCOM goes low at the next zero
crossing, CD1 is discharged at approximately
twice the charging current. When CD1
reaches the CD threshold, a commutation
occurs. CD2 operates similarly except on the
opposite phase of FCOM . Thus the com-
mutations occur approximately halfway
between zero crossings. The actual delay is
slightly less than halfway to compensate for
electrical delays in the motor, which im-
proves efficiency.
V
TH
V
TL
V
CWD
t
BLANK
BLANK
t
WD
Dwg. WP-021
WATCHDOG-TRIGGERED
COMMUTATION