A8902CLBA

更新时间： 2024-02-02 14:29:03

品牌	Logo	应用领域
急速微 - ALLEGRO		驱动器电动机控制电机控制器
页数	文件大小	规格书
12页	157K
描述
3-PHASE BRUSHLESS DC MOTOR CONTROLLER/DRIVER WITH BACK-EMF SENSING

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数据手册

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A8902CLBA 数据手册

8902–A

3-PHASE BRUSHLESS DC

MOTOR CONTROLLER/DRIVER

TERMINAL FUNCTIONS

Term.

Terminal Name

LOAD SUPPLY

C_D2

Function

V_BB; the 5 V or 12 V motor supply.

One of two capacitors used to generate the ideal commutation points from the

back-EMF zero crossing points.

C_WD

Timing capacitor used by the watchdog circuit to disable the back-EMF compara-

tors during commutation transients, and to detect incorrect motor position.

C_ST

OUT_A

Startup oscillator timing capacitor.

Power amplifier A output to motor.

6-7

GROUND

OUT_B

Power and logic ground and thermal heat sink.

Power amplifier B output to motor.

OUT_C

Power amplifier C output to motor.

CENTERTAP

BRAKE

Motor centertap connection for back-EMF detection circuitry.

Active low turns ON all three sink drivers shorting the motor windings to ground.

External capacitor and resistor at BRAKE provide brake delay. The brake function

can also be controlled via the serial port.

C_RES

FILTER

External reservoir capacitor used to hold charge to drive the source drivers’

gates. Also provides power for brake circuit.

Analog voltage input to control motor current. Also, compensation node for

internal speed control loop.

SECTOR DATA

External tachometer input. Can use sector or index pulses from disk to provide

precise motor speed feedback to internal frequency-locked loop.

LOGIC SUPPLY

OSCILLATOR

DATA OUT

V_DD; the 5 V logic supply.

Clock input for the speed reference counter. Typical max. frequency is 10 MHz.

Thermal shutdown indicator, FCOM, TACH, or SYNC signals available in real

time, controlled by 2-bit multiplexer in serial port.

18-19

GROUND

RESET

Power and logic ground and thermal heat sink.

When pulled low forces the chip into sleep mode; clears all serial port bits.

Strobe input (active low) for data word.

CHIP SELECT

CLOCK

Clock input for serial port.

DATA IN

C_D1

Sequential data input for the serial port.

One of two capacitors used to generate the ideal commutation points from the

back-EMF zero crossing points.

1 2 3 456 7 8...12

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