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A81407 PDF预览

A81407

更新时间: 2022-06-24 15:42:25
品牌 Logo 应用领域
急速微 - ALLEGRO /
页数 文件大小 规格书
58页 3082K
描述
Multi-Output Regulator with Buck or Buck-Boost Pre-Regulator

A81407 数据手册

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Multi-Output Regulator with Buck or Buck-Boost Pre-Regulator,  
4× LDO Outputs, Watchdog, 4× Gate Drivers, and SPI  
A81407  
ELECTRICAL CHARACTERISTICS [1]: Valid at 3.8 V [4] ≤ VVIN ≤ 36 V, 40°C ≤ TJ ≤ 150°C, VENB = High or VENBAT = High,  
unless otherwise specified  
Characteristic  
Symbol  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
GENERAL SPECIFICATIONS  
After VVIN > VVIN(START) and VREG in regulating,  
Buck-Boost Mode  
3.8  
5.5  
13.5  
13.5  
36  
36  
V
V
Operating Input Voltage [2]  
VVIN  
After VVIN > VVIN(START) and VREG in regulating,  
Buck Mode  
VIN UVLO Start Voltage  
VIN UVLO Stop Voltage  
VIN UVLO Hysteresis  
VVIN(START)  
VVIN(STOP)  
VVIN(HYS)  
IQ  
VVIN rising  
4.55  
3.25  
4.8  
3.5  
1.3  
13  
5.05  
3.75  
V
V
VVIN falling  
VVIN(START) ‒ VVIN(STOP)  
VVIN = 13.5 V, VVREG = 5.6 V (no PWM)  
V
mA  
VIN Supply Quiescent Current [1][3]  
VVIN = 13.5 V,  
VENBAT = Low and VENB = Low, TJ = 25°C  
IQ(SLEEP)  
13  
µA  
PWM SWITCHING FREQUENCY AND DITHERING  
Switching Frequency  
Frequency Dithering  
fOSC  
Dithering off  
As a percent of fOSC  
VVIN rising  
2.0  
2.2  
±10  
9.0  
17  
2.4  
MHz  
%
V
ΔfOSC  
8.5  
9.5  
VIN Dithering Start Threshold [2]  
VVIN(DITHER,ON)  
VVIN falling  
V
VVIN falling  
7.8  
8.3  
18  
8.8  
V
VIN Dithering Stop Threshold [2] VVIN(DITHER,OFF)  
VVIN rising  
V
SYSTEM (WATCHDOG) CLOCK  
Internal Clock Frequency  
fSYS  
8
MHz  
%
Internal Clock Tolerance  
fSYS(TOL)  
‒5  
+5  
CHARGE PUMP (VCP AND VCP2)  
VVCP2 – VVIN, VVIN ≥ 9 V, IVCP2 > –5 mA,  
Buck Mode  
4.1  
3.6  
3.0  
9
6.6  
4.4  
3.8  
10  
V
V
V
V
V
VCP2 Output Voltage  
(for Pre-Regulator)  
VVCP2 – VVIN, 5.5 V < VVIN ≤ 9 V, IVCP2 > –5 mA,  
Buck Mode  
VVCP2  
VVCP2 – VVIN, 3.8 V < VVIN ≤ 5.5 V,  
VREG = 5.35 V, IVCP2 > –5 mA, Buck-Boost Mode  
VVCP – VVIN, VVIN > 9 V, IVCP > –1 mA,  
Buck Mode  
VCP Output Voltage  
(for Gate Drivers)  
VVCP – VVIN, 5.5 V < VVIN ≤ 9 V, IVCP > –1 mA,  
Buck Mode  
VVCP  
8
10  
VVCP – VVIN, 3.8 V < VVIN ≤ 5.5 V, VVREG  
5.35 V, IVCP > –1 mA, Buck-Boost Mode  
=
6.6  
9.5  
65  
V
Switching Frequency  
fCPx  
kHz  
VCC PIN VOLTAGE  
Output Voltage  
VVCC  
VVREG = 5.35 V  
TJ rising  
4.4  
V
THERMAL PROTECTION  
Thermal Shutdown Threshold [2]  
Thermal Shutdown Hysteresis [2]  
TTSD  
THYS  
165  
°C  
°C  
15  
[1] For input and output current specifications, negative current is defined as coming out of the node or pin (sourcing), positive current is defined as going into the node or  
pin (sinking).  
[2] Ensured by design and characterization, not production tested.  
[3] Specifications at 25°C or 85°C are guaranteed by design and characterization, not production tested.  
[4] The lowest operating voltage is only valid if the conditions VVIN > VVIN(START) and VVCP – VVIN > VVCP(UV,H) and VVREG in regulating are satisfied before VVIN is reduced.  
7
Allegro MicroSystems  
955 Perimeter Road  
Manchester, NH 03103-3353 U.S.A.  
www.allegromicro.com  

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