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A623308AV-70SI PDF预览

A623308AV-70SI

更新时间: 2024-02-04 04:34:43
品牌 Logo 应用领域
联笙电子 - AMICC 静态存储器
页数 文件大小 规格书
14页 385K
描述
SRAM

A623308AV-70SI 技术参数

生命周期:Obsolete包装说明:,
Reach Compliance Code:unknown风险等级:5.84
Base Number Matches:1

A623308AV-70SI 数据手册

 浏览型号A623308AV-70SI的Datasheet PDF文件第3页浏览型号A623308AV-70SI的Datasheet PDF文件第4页浏览型号A623308AV-70SI的Datasheet PDF文件第5页浏览型号A623308AV-70SI的Datasheet PDF文件第7页浏览型号A623308AV-70SI的Datasheet PDF文件第8页浏览型号A623308AV-70SI的Datasheet PDF文件第9页 
A623308A Series  
AC Characteristics (TA = 0°C to +70°C, -25°C to +85°C or -40°C to +85°C, VCC = 5.0V ± 10%)  
A623308A-70S/SI/SU  
Symbol  
Parameter  
Unit  
Min.  
Max.  
Read Cycle  
tRC  
Read Cycle Time  
70  
-
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
tAA  
Address Access Time  
70  
70  
35  
-
tACE  
tOE  
Chip Enable Access Time  
-
Output Enable to Output Valid  
Chip Enable to Output in Low Z  
Output Enable to Output in Low Z  
Chip Disable to Output in High Z  
Output Disable to Output in High Z  
Output Hold from Address Change  
-
tCLZ  
10  
5
tOLZ  
-
tCHZ  
tOHZ  
tOH  
-
25  
25  
-
-
10  
Write Cycle  
tWC  
Write Cycle Time  
70  
60  
0
-
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
tCW  
Chip Enable to End of Write  
Address Set up Time  
tAS  
-
tAW  
Address Valid to End of Write  
Write Pulse Width  
60  
50  
0
-
tWP  
-
tWR  
Write Recovery Time  
-
tWHZ  
tDW  
Write to Output in High Z  
Data to Write Time Overlap  
Data Hold from Write Time  
Output Active from End of Write  
-
25  
-
30  
0
tDH  
-
tOW  
5
-
Notes: tCHZ, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are not  
referred to output voltage levels.  
PRELIMINARY (November, 2004, Version 0.0)  
5
AMIC Technology, Corp.  

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