5秒后页面跳转
A43P1616V-95I PDF预览

A43P1616V-95I

更新时间: 2022-04-25 03:53:56
品牌 Logo 应用领域
联笙电子 - AMICC 动态存储器
页数 文件大小 规格书
42页 502K
描述
1M X 16 Bit X 4 Banks Synchronous DRAM

A43P1616V-95I 数据手册

 浏览型号A43P1616V-95I的Datasheet PDF文件第3页浏览型号A43P1616V-95I的Datasheet PDF文件第4页浏览型号A43P1616V-95I的Datasheet PDF文件第5页浏览型号A43P1616V-95I的Datasheet PDF文件第7页浏览型号A43P1616V-95I的Datasheet PDF文件第8页浏览型号A43P1616V-95I的Datasheet PDF文件第9页 
A43L2616B  
Decoupling Capacitance Guide Line  
Recommended decoupling capacitance added to power line at board.  
Parameter  
Symbol  
Value  
Unit  
μF  
Decoupling Capacitance between VDD and VSS  
Decoupling Capacitance between VDDQ and VSSQ  
CDC1  
CDC2  
0.1 + 0.01  
0.1 + 0.01  
μF  
Note: 1. VDD and VDDQ pins are separated each other.  
All VDD pins are connected in chip. All VDDQ pins are connected in chip.  
2. VSS and VSSQ pins are separated each other  
All VSS pins are connected in chip. All VSSQ pins are connected in chip.  
DC Electrical Characteristics  
(Recommended operating condition unless otherwise noted, TA = 0°C to 70°C TA = -40ºC to +85ºC)  
Speed  
Symbol  
Parameter  
Test Conditions  
Unit Notes  
-6  
-7  
Operating Current  
(One Bank Active)  
Burst Length = 1  
Icc1  
70  
70  
mA  
mA  
1
tRC tRC(min), tCC tCC(min), IOL = 0mA  
Icc2 P  
CKE VIL(max), tCC = 15ns  
2
1
Precharge Standby Current  
in power-down mode  
Icc2 PS  
CKE VIL(max), tCC = ∞  
CKE VIH(min), CS VIH(min), tCC = 15ns  
ICC2N  
20  
15  
Precharge Standby Current  
in non power-down mode  
Input signals are changed one time during 30ns  
mA  
CKE VIH(min), CLK VIL(max), tCC = ∞  
Input signals are stable.  
ICC2NS  
Active Standby current in  
non power-down mode  
(One Bank Active)  
CKE VIH(min), CS VIH(min), tCC = 15ns  
Input signals are changed one time during 30ns  
ICC3N  
ICC4  
30  
mA  
mA  
Operating Current  
(Burst Mode)  
IOL = 0mA, Page Burst  
All bank Activated, tCCD = tCCD (min)  
100  
130  
100  
130  
1
2
ICC5  
ICC6  
Refresh Current  
mA  
mA  
tRC tRC (min)  
CKE 0.2V  
Self Refresh Current  
1.5  
Note: 1. Measured with outputs open. Addresses are changed only one time during tCC(min).  
2. Refresh period is 64ms. Addresses are changed only one time during tCC(min).  
(December, 2009, Version 1.3)  
5
AMIC Technology, Corp.  

与A43P1616V-95I相关器件

型号 品牌 描述 获取价格 数据表
A43P1632G-75I AMICC 1M X 16 Bit X 4 Banks Synchronous DRAM

获取价格

A43P1632G-95I AMICC 1M X 16 Bit X 4 Banks Synchronous DRAM

获取价格

A43P1632V-75I AMICC 1M X 16 Bit X 4 Banks Synchronous DRAM

获取价格

A43P1632V-95I AMICC 1M X 16 Bit X 4 Banks Synchronous DRAM

获取价格

A43P26161 AMICC 1M X 16 Bit X 4 Banks Low Power Synchronous DRAM

获取价格

A43P26161G-75 AMICC 1M X 16 Bit X 4 Banks Low Power Synchronous DRAM

获取价格