A43L3616A/A43L4608A
2M x 16 Bit x 4 Banks, 4M X 8 Bit X 4 Banks Synchronous DRAM
Preliminary
Features
JEDEC standard 3.3V ± 0.3V power supply
LVTTL compatible with multiplexed address
Industrial operating range: -40°C to +85°C for -U
Burst Read Single-bit Write operation
DQM for masking
Auto & self refresh
64ms refresh period (4K cycle)
54 Pin TSOP (II)
Four banks / Pulse RAS
MRS cycle with address key programs
- CAS Latency (2,3)
- Burst Length (1,2,4,8)
Pb-free packaging
All Pb-free (Lead-free) products are RoHS compliant
- Burst Type (Sequential & Interleave)
All inputs are sampled at the positive going edge of the
system clock
General Description
The
A43L3616A/A43L4608A
is
134,217,728
bits
precise cycle control with the use of system clock. I/O
transactions are possible on every clock cycle. Range of
operating frequencies, programmable latencies allows the
same device to be useful for a variety of high bandwidth, high
performance memory system applications.
synchronous high data rate Dynamic RAM organized as 4 X
2,097,152 words by 16 bits, A43L4608A is 134,217,728 bits
synchronous high data rate Dynamic RAM organized as 4 X
4,194,304 words by 8 bits, fabricated with AMIC’s high
performance CMOS technology. Synchronous design allows
PRELIMINARY (May, 2008, Version 0.3)
1
AMIC Technology, Corp.