A43L3616A/A43L4608A
Decoupling Capacitance Guide Line
Recommended decoupling capacitance added to power line at board.
Parameter
Symbol
Value
Unit
μF
Decoupling Capacitance between VDD and VSS
Decoupling Capacitance between VDDQ and VSSQ
CDC1
CDC2
0.1 + 0.01
0.1 + 0.01
μF
Note: 1. VDD and VDDQ pins are separated each other.
All VDD pins are connected in chip. All VDDQ pins are connected in chip.
2. VSS and VSSQ pins are separated each other
All VSS pins are connected in chip. All VSSQ pins are connected in chip.
DC Electrical Characteristics
(Recommended operating condition unless otherwise noted, TA = 0 to 70°C or -40ºC to +85ºC for -U)
Speed
-7
Symbol
Parameter
Test Conditions
Organization
Unit Notes
-6
-75
Burst Length = 1
tRC = tRC(min), tCC = tCC(min), IOL =
0mA
115
95
85
X 8
Operating Current
(One Bank Active)
Icc1
mA
mA
1
120
100
90
X 16
Precharge Standby
Current in power-down
mode
Icc2 P
CKE = VIL(max), tCC = 10ns
CLK = VIL(max), tCC = ∞
X 8 / X 16
X 8 / X 16
10
5
Icc2 PS
CKE = VIH(min), CS = VIH(min), tCC
= 10ns
Input signals are changed one time
during 20ns
ICC2N
X 8 / X 16
35
Precharge Standby
Current in non power-
down mode
mA
CKE = VIH(min), CLK = VIL(max),
tCC = ∞
Input signals are stable.
ICC2NS
ICC3N
X 8 / X 16
X 8 / X 16
X 8 / X 16
20
60
30
CKE = VIH(min), CS = VIH(min), tCC
= 10ns
Input signals are changed one time
during 20ns
mA
mA
Active Standby current
in non power-down
mode (One Bank Active)
CKE = VIH(min), CLK = VIL(max),
tCC = ∞
Input signals are stable
ICC3NS
ICC3P
CKE = VIL(max), tcc=10ns
X 8 / X 16
X 8 / X 16
35
20
mA
mA
Active Standby current
in power-down mode
(One Bank Active)
ICC3PS
CKE & CLK = VIL(max), tcc= ∞
Operating Current
(Burst Mode)
IOL = 0mA, Page Bust
All bank Activated, tCCD = tCCD (min)
140
125
120
ICC4
X 8 / X 16
mA
1
2
200
6
190
6
ICC5
ICC6
Refresh Current
tRC = tRC (min)
X 8 / X 16
X 8 / X 16
220
6
mA
mA
Self Refresh Current
CKE = 0.2V
Note: 1. Measured with outputs open. Addresses are changed only one time during tCC(min).
2. Refresh period is 64ms. Addresses are changed only one time during tCC(min).
3. Unless otherwise noted, input swing IeveI is CMOS (VIH /VIL=VDDQ/VSSQ).
PRELIMINARY (May, 2008, Version 0.3)
6
AMIC Technology, Corp.