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A43L4608AV-7F PDF预览

A43L4608AV-7F

更新时间: 2024-02-07 21:42:25
品牌 Logo 应用领域
联笙电子 - AMICC 动态存储器
页数 文件大小 规格书
40页 591K
描述
DRAM

A43L4608AV-7F 技术参数

生命周期:Contact Manufacturer包装说明:,
Reach Compliance Code:unknown风险等级:5.75
Base Number Matches:1

A43L4608AV-7F 数据手册

 浏览型号A43L4608AV-7F的Datasheet PDF文件第4页浏览型号A43L4608AV-7F的Datasheet PDF文件第5页浏览型号A43L4608AV-7F的Datasheet PDF文件第6页浏览型号A43L4608AV-7F的Datasheet PDF文件第8页浏览型号A43L4608AV-7F的Datasheet PDF文件第9页浏览型号A43L4608AV-7F的Datasheet PDF文件第10页 
A43L3616A/A43L4608A  
Decoupling Capacitance Guide Line  
Recommended decoupling capacitance added to power line at board.  
Parameter  
Symbol  
Value  
Unit  
μF  
Decoupling Capacitance between VDD and VSS  
Decoupling Capacitance between VDDQ and VSSQ  
CDC1  
CDC2  
0.1 + 0.01  
0.1 + 0.01  
μF  
Note: 1. VDD and VDDQ pins are separated each other.  
All VDD pins are connected in chip. All VDDQ pins are connected in chip.  
2. VSS and VSSQ pins are separated each other  
All VSS pins are connected in chip. All VSSQ pins are connected in chip.  
DC Electrical Characteristics  
(Recommended operating condition unless otherwise noted, TA = 0 to 70°C or -40ºC to +85ºC for -U)  
Speed  
-7  
Symbol  
Parameter  
Test Conditions  
Organization  
Unit Notes  
-6  
-75  
Burst Length = 1  
tRC = tRC(min), tCC = tCC(min), IOL =  
0mA  
115  
95  
85  
X 8  
Operating Current  
(One Bank Active)  
Icc1  
mA  
mA  
1
120  
100  
90  
X 16  
Precharge Standby  
Current in power-down  
mode  
Icc2 P  
CKE = VIL(max), tCC = 10ns  
CLK = VIL(max), tCC = ∞  
X 8 / X 16  
X 8 / X 16  
10  
5
Icc2 PS  
CKE = VIH(min), CS = VIH(min), tCC  
= 10ns  
Input signals are changed one time  
during 20ns  
ICC2N  
X 8 / X 16  
35  
Precharge Standby  
Current in non power-  
down mode  
mA  
CKE = VIH(min), CLK = VIL(max),  
tCC = ∞  
Input signals are stable.  
ICC2NS  
ICC3N  
X 8 / X 16  
X 8 / X 16  
X 8 / X 16  
20  
60  
30  
CKE = VIH(min), CS = VIH(min), tCC  
= 10ns  
Input signals are changed one time  
during 20ns  
mA  
mA  
Active Standby current  
in non power-down  
mode (One Bank Active)  
CKE = VIH(min), CLK = VIL(max),  
tCC = ∞  
Input signals are stable  
ICC3NS  
ICC3P  
CKE = VIL(max), tcc=10ns  
X 8 / X 16  
X 8 / X 16  
35  
20  
mA  
mA  
Active Standby current  
in power-down mode  
(One Bank Active)  
ICC3PS  
CKE & CLK = VIL(max), tcc= ∞  
Operating Current  
(Burst Mode)  
IOL = 0mA, Page Bust  
All bank Activated, tCCD = tCCD (min)  
140  
125  
120  
ICC4  
X 8 / X 16  
mA  
1
2
200  
6
190  
6
ICC5  
ICC6  
Refresh Current  
tRC = tRC (min)  
X 8 / X 16  
X 8 / X 16  
220  
6
mA  
mA  
Self Refresh Current  
CKE = 0.2V  
Note: 1. Measured with outputs open. Addresses are changed only one time during tCC(min).  
2. Refresh period is 64ms. Addresses are changed only one time during tCC(min).  
3. Unless otherwise noted, input swing IeveI is CMOS (VIH /VIL=VDDQ/VSSQ).  
PRELIMINARY (May, 2008, Version 0.3)  
6
AMIC Technology, Corp.  

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