Datasheet > A43L4608AV-75F

A43L4608AV-75F

更新时间： 2024-01-06 04:16:31

品牌	Logo	应用领域
联笙电子 - AMICC		动态存储器
页数	文件大小	规格书
40页	591K
描述
DRAM

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技术参数
数据手册

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A43L4608AV-75F 技术参数

生命周期：	Contact Manufacturer	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.75
Base Number Matches：	1

A43L4608AV-75F 数据手册

A43L3616A/A43L4608A

2M x 16 Bit x 4 Banks, 4M X 8 Bit X 4 Banks Synchronous DRAM

Preliminary

Features

JEDEC standard 3.3V ± 0.3V power supply

LVTTL compatible with multiplexed address

Industrial operating range: -40°C to +85°C for -U

Burst Read Single-bit Write operation

DQM for masking

Auto & self refresh

64ms refresh period (4K cycle)

54 Pin TSOP (II)

Four banks / Pulse RAS

MRS cycle with address key programs

- CAS Latency (2,3)

- Burst Length (1,2,4,8)

Pb-free packaging

All Pb-free (Lead-free) products are RoHS compliant

- Burst Type (Sequential & Interleave)

All inputs are sampled at the positive going edge of the

system clock

General Description

The

A43L3616A/A43L4608A

134,217,728

bits

precise cycle control with the use of system clock. I/O

transactions are possible on every clock cycle. Range of

operating frequencies, programmable latencies allows the

same device to be useful for a variety of high bandwidth, high

performance memory system applications.

synchronous high data rate Dynamic RAM organized as 4 X

2,097,152 words by 16 bits, A43L4608A is 134,217,728 bits

synchronous high data rate Dynamic RAM organized as 4 X

4,194,304 words by 8 bits, fabricated with AMIC’s high

performance CMOS technology. Synchronous design allows

PRELIMINARY (May, 2008, Version 0.3)

AMIC Technology, Corp.

123 4 5 6 7...40

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