A43L1632A
Decoupling Capacitance Guide Line
Recommended decoupling capacitance added to power line at board.
Parameter
Symbol
Value
Unit
μF
Decoupling Capacitance between VDD and VSS
Decoupling Capacitance between VDDQ and VSSQ
CDC1
CDC2
0.1 + 0.01
0.1 + 0.01
μF
Note: 1. VDD and VDDQ pins are separated each other.
All VDD pins are connected in chip. All VDDQ pins are connected in chip.
2. VSS and VSSQ pins are separated each other
All VSS pins are connected in chip. All VSSQ pins are connected in chip.
DC Electrical Characteristics
(Recommended operating condition unless otherwise noted, TA = 0 to 70°C or TA = -40ºC to +85ºC)
Speed
CAS
Latency
Unit Note
-7
Symbol
Parameter
Test Conditions
Burst Length = 1
-5
-5.5
-6
3
2
140
140
130
130
Operating Current
(One Bank Active)
Icc1
tRC ≥ tRC(min), tCC ≥ tCC(min),
IOL = 0mA
mA
mA
1
110
Icc2 P
CKE ≤ VIL(max), tCC = 15ns
2
2
Precharge Standby Current
in power-down mode
Icc2 PS
CKE & CLK ≤ VIL(max), tCC = ∞
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 15ns
12
7
ICC2N
Precharge Standby Current
in non power-down mode
Input signals are changed one time during 30ns
mA
mA
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
ICC2NS
ICC3P
CKE ≤ VIL(max), tCC = 15ns
CKE ≤ VIL(max), tCC = ∞
4
4
Active Standby Current in
power-down mode
ICC3PS
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 15ns
Input signals are changed one time during 30ns
40
35
ICC3N
Active Standby current in
non power-down mode
(One Bank Active)
mA
mA
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
ICC3NS
3
170
150
160
150
150
140
140
120
Operating Current
(Burst Mode)
IOL = 0mA, Page Burst
All bank Activated, tCCD = tCCD (min)
ICC4
1
2
2
120
120
3
ICC5
ICC6
Refresh Current
mA
mA
tRC ≥ tRC (min)
2
Self Refresh Current
CKE ≤ 0.2V
Note: 1. Measured with outputs open. Addresses are changed only one time during tCC(min).
2. Refresh period is 64ms. Addresses are changed only one time during tCC(min).
PRELIMINARY (March, 2007, Version 0.0)
6
AMIC Technology, Corp.