Datasheet > A43L1632

A43L1632

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
联笙电子 - AMICC		动态存储器
页数	文件大小	规格书
43页	1059K
描述
512K X 32 Bit X 4 Banks Synchronous DRAM

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数据手册

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A43L1632 数据手册

A43L1632

Preliminary

512K X 32 Bit X 4 Banks Synchronous DRAM

Features

ꢀJEDEC standard 3.3V power supply

ꢀDQM for masking

ꢀLVTTL compatible with multiplexed address

ꢀAuto & self refresh

ꢀ64ms refresh period (4K cycle)

ꢀSelf refresh with programmable refresh period through

EMRS cycle

ꢀProgrammable Power Reduction Feature by partial array

activation during Self-refresh through EMRS cycle

ꢀ86 Pin TSOP (II)

ꢀFour banks / Pulse RAS

ꢀMRS cycle with address key programs

- CAS Latency (2,3)

- Burst Length (1,2,4,8 & full page)

- Burst Type (Sequential & Interleave)

ꢀAll inputs are sampled at the positive going edge of the

system clock

ꢀoperating temperature range: 0ºC to + 70ºC

ꢀDeep Power Down Mode

ꢀBurst Read Single-bit Write operation

ꢀClock Frequency (max) : 166MHz @ CL=3 (-6)

143MHz @ CL=3 (-7)

General Description

The A43L1632 is 67,108,864 bits Low Power synchronous

high data rate Dynamic RAM organized as 2 X 1,048,576

words by 32 bits, fabricated with AMIC’s high performance

CMOS technology. Synchronous design allows precise

cycle control with the use of system clock. I/O transactions

are possible on every clock cycle. Range of operating

frequencies, programmable latencies allows the same

device to be useful for a variety of high bandwidth, high

performance memory system applications.

PRELIMINARY (December, 2004, Version 0.0)

AMIC Technology, Corp.

123 4 5 6 7...43

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