Datasheet > A43L1616G-7UF

A43L1616G-7UF

更新时间： 2024-01-17 04:06:19

品牌	Logo	应用领域
联笙电子 - AMICC		动态存储器
页数	文件大小	规格书
46页	549K
描述
DRAM

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技术参数
数据手册

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A43L1616G-7UF 技术参数

生命周期：	Contact Manufacturer	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.75
Base Number Matches：	1

A43L1616G-7UF 数据手册

A43L1616

Preliminary

1M X 16 Bit X 2 Banks Synchronous DRAM

Features

Power supply

- VDD: 3.3V VDDQ : 3.3V

LVTTL compatible with multiplexed address

All inputs are sampled at the positive going edge of the

system clock

DQM for masking

Auto & self refresh

Two banks / Pulse RAS

64ms refresh period (4K cycle)

Industrial operating temperature range: -40ºC to +85ºC

for -U series.

Available in 54 Balls CSP (8mm X 8mm) and 54-pin

TSOP(II) packages

MRS cycle with address key programs

- CAS Latency (2 & 3)

- Burst Length (1,2,4,8 & full page)

- Burst Type (Sequential & Interleave)

Clock Frequency (max) : 167MHz @ CL=3 (-6)

143MHz @ CL=3 (-7)

Package is available to lead free (-F series)

All Pb-free (Lead-free) products are RoHS compliant

General Description

The A43L1616 is 33,554,432 bits synchronous high data

rate Dynamic RAM organized as 2 X 1,048,576 words by

16 bits, fabricated with AMIC’s high performance CMOS

technology. Synchronous design allows precise cycle

control with the use of system clock. I/O transactions are

possible on every clock cycle. Range of operating

frequencies, programmable latencies allows the same

device to be useful for a variety of high bandwidth, high

performance memory system applications.

Pin Configuration

54 Balls CSP (8 mm x 8 mm)

Top View

54 Ball (6X9) CSP

VSS

DQ15

DQ13

DQ11

DQ9

VSSQ

VDDQ

VSSQ

VDDQ

VSS

VDDQ

VSSQ

VDDQ

VSSQ

VDD

DQ0

DQ2

DQ4

DQ6

LDQM

VDD

DQ1

DQ3

DQ5

DQ7

DQ14

DQ12

DQ10

DQ8

UDQM

CLK

CKE

CAS

RAS

A10

VDD

VSS

PRELIMINARY

(February, 2008, Version 0.3)

AMIC Technology, Corp.

123 4 5 6 7...46

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