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A3959SB PDF预览

A3959SB

更新时间: 2024-01-03 14:41:50
品牌 Logo 应用领域
急速微 - ALLEGRO 驱动器运动控制电子器件信号电路光电二极管电动机控制电机
页数 文件大小 规格书
12页 275K
描述
DMOS FULL-BRIDGE PWM MOTOR DRIVER

A3959SB 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:HTSSOP, TSSOP28,.25针数:28
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:1.06
模拟集成电路 - 其他类型:STEPPER MOTOR CONTROLLERJESD-30 代码:R-PDSO-G28
JESD-609代码:e3长度:9.7 mm
湿度敏感等级:2功能数量:1
端子数量:28最高工作温度:85 °C
最低工作温度:-20 °C最大输出电流:6 A
封装主体材料:PLASTIC/EPOXY封装代码:HTSSOP
封装等效代码:TSSOP28,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, HEAT SINK/SLUG, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:5 V认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Motion Control Electronics
最大供电电流 (Isup):10 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:NMOS
温度等级:OTHER端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:4.4 mmBase Number Matches:1

A3959SB 数据手册

 浏览型号A3959SB的Datasheet PDF文件第3页浏览型号A3959SB的Datasheet PDF文件第4页浏览型号A3959SB的Datasheet PDF文件第5页浏览型号A3959SB的Datasheet PDF文件第7页浏览型号A3959SB的Datasheet PDF文件第8页浏览型号A3959SB的Datasheet PDF文件第9页 
3959  
DMOS FULL-BRIDGE  
PWM MOTOR DRIVER  
FUNCTIONAL DESCRIPTION (continued)  
Internal Current-Control Mode. Inputs PFD1 and  
PFD2 determine the current-decay method after an  
overcurrent event is detected at the SENSE input. In  
slow-decay mode, both sink drivers are turned on for the  
fixed off-time period. Mixed-decay mode starts out in  
fast-decay mode for a portion (15% or 48%) of the fixed  
off time, and then is followed by slow decay for the  
remainder of the period.  
Synchronous Rectification. When a PWM off cycle  
is triggered, either by an ENABLE chop command or  
internal fixed off-time cycle, load current will recirculate  
according to the decay mode selected by the control logic.  
The A3959 synchronous rectification feature will turn on  
the appropriate pair of DMOS outputs during the current  
decay and effectively short out the body diodes with the  
low rDS(on) driver. This will reduce power dissipation  
significantly and can eliminate the need for external  
Schottky diodes.  
PFD2  
PFD1  
% toff  
0
Decay  
Slow  
0
0
1
1
0
1
0
1
Synchronous rectification will prevent reversal of load  
current by turning off all outputs when a zero-current level  
is detected.  
15  
Mixed  
Mixed  
Fast  
48  
Shutdown. In the event of a fault (excessive junction  
temperature, or low voltage on CP or VREG) the outputs of  
the device are disabled until the fault condition is  
removed. At power up, and in the event of low VDD, the  
UVLO circuit disables the drivers.  
100  
PWM Blank Timer. When a source driver turns on, a  
current spike occurs due to the reverse-recovery currents  
of the clamp diodes and/or switching transients related to  
distributed capacitance in the load. To prevent this current  
spike from erroneously resetting the source-enable latch,  
the sense comparator is blanked. The blank timer runs  
after the off-time counter to provide the blanking function.  
The blank timer is reset when ENABLE is chopped or  
PHASE is changed. For external PWM control, a PHASE  
change or ENABLE on will trigger the blanking function.  
The duration is determined by the BLANK input and the  
oscilator.  
Braking. The braking function is implemented by  
driving the device in slow-decay mode via EXTMODE  
and applying an enable chop command. Because it is  
possible to drive current in either direction through the  
DMOS drivers, this configuration effectively shorts out  
the motor-generated BEMF as long as the ENABLE chop  
mode is asserted. It is important to note that the internal  
PWM current-control circuit will not limit the current  
when braking, because the current does not flow through  
the sense resistor. The maximum brake current can be  
approximated by VBEMF/RL. Care should be taken to  
ensure that the maximum ratings of the device are not  
exceeded in worst-case braking situations of high speed  
and high inertial loads.  
BLANK  
tblank  
6/fosc  
0
1
12/fosc  
SLEEP Logic. The SLEEP input terminal is used to  
minimize power consumption when when not in use. This  
disables much of the internal circuitry including the  
regulator and charge pump. Logic low will put the device  
into sleep mode, logic high will allow normal operation.  
115 Northeast Cutoff, Box 15036  
Worcester, Massachusetts 01615-0036 (508) 853-5000  
6

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