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A2F200M3F-1CSG288YI PDF预览

A2F200M3F-1CSG288YI

更新时间: 2024-01-22 13:45:21
品牌 Logo 应用领域
美高森美 - MICROSEMI 可编程逻辑时钟
页数 文件大小 规格书
192页 11779K
描述
Field Programmable Gate Array, 4608 CLBs, 200000 Gates, 100MHz, 4608-Cell, CMOS, PBGA288, 11 X 11 MM, 1.05 MM HEIGHT, 0.50 MM PITCH, GREEN, BGA-288

A2F200M3F-1CSG288YI 技术参数

是否Rohs认证:符合生命周期:Active
包装说明:TFBGA, BGA288,21X21,20Reach Compliance Code:compliant
风险等级:5.25Is Samacsys:N
最大时钟频率:100 MHzJESD-30 代码:S-PBGA-B288
JESD-609代码:e1长度:11 mm
湿度敏感等级:3可配置逻辑块数量:4608
等效关口数量:200000输入次数:78
逻辑单元数量:4608输出次数:78
端子数量:288最高工作温度:100 °C
最低工作温度:-40 °C组织:4608 CLBS, 200000 GATES
封装主体材料:PLASTIC/EPOXY封装代码:TFBGA
封装等效代码:BGA288,21X21,20封装形状:SQUARE
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH峰值回流温度(摄氏度):260
电源:1.5,1.8,2.5,3.3 V可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY
认证状态:Not Qualified座面最大高度:1.05 mm
子类别:Field Programmable Gate Arrays最大供电电压:1.575 V
最小供电电压:1.425 V标称供电电压:1.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Silver/Copper (Sn/Ag/Cu)
端子形式:BALL端子节距:0.5 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:30
宽度:11 mmBase Number Matches:1

A2F200M3F-1CSG288YI 数据手册

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SmartFusion Family Overview  
ProASIC3 FPGA Fabric  
The SmartFusion cSoC family, based on the proven, low power, firm-error immune ProASIC®3 flash  
FPGA architecture, benefits from the advantages only flash-based devices offer:  
Reduced Cost of Ownership  
Advantages to the designer extend beyond low unit cost, high performance, and ease of use. Flash-  
based SmartFusion cSoCs are Instant On and do not need to be loaded from an external boot PROM at  
each power-up. On-board security mechanisms prevent access to the programming information and  
enable secure remote updates of the FPGA logic. Designers can perform secure remote in-system  
programming (ISP) to support future design iterations and critical field upgrades, with confidence that  
valuable IP cannot be compromised or copied. Secure ISP can be performed using the industry standard  
AES algorithm with MAC data authentication on the device.  
Low Power  
Flash-based SmartFusion cSoCs exhibit power characteristics similar to those of an ASIC, making them  
an ideal choice for power-sensitive applications. With SmartFusion cSoCs, there is no power-on current  
and no high current transition, both of which are common with SRAM-based FPGAs.  
SmartFusion cSoCs also have low dynamic power consumption and support very low power time-  
keeping mode, offering further power savings.  
Security  
As the nonvolatile, flash-based SmartFusion cSoC family requires no boot PROM, there is no vulnerable  
external bitstream. SmartFusion cSoCs incorporate FlashLock®, which provides a unique combination of  
reprogrammability and design security without external overhead, advantages that only a device with  
nonvolatile flash programming can offer.  
SmartFusion cSoCs utilize a 128-bit flash-based key lock and a separate AES key to provide security for  
programmed IP and configuration data. The FlashROM data in Fusion devices can also be encrypted  
prior to loading. Additionally, the flash memory blocks can be programmed during runtime using the AES-  
128 block cipher encryption standard (FIPS Publication 192).  
SmartFusion cSoCs with AES-based security are designed to provide protection for remote field updates  
over public networks, such as the Internet, and help to ensure that valuable IP remains out of the hands  
of system overbuilders, system cloners, and IP thieves. As an additional security measure, the FPGA  
configuration data of a programmed Fusion device cannot be read back, although secure design  
verification is possible. During design, the user controls and defines both internal and external access to  
the flash memory blocks.  
Security, built into the FPGA fabric, is an inherent component of the SmartFusion cSoC family. The flash  
cells are located beneath seven metal layers, and many device design and layout techniques have been  
used to make invasive attacks extremely difficult. SmartFusion cSoCs, with FlashLock and AES security,  
are unique in being highly resistant to both invasive and noninvasive attacks. Your valuable IP is  
protected with industry standard security measures, making remote ISP feasible. A SmartFusion cSoC  
provides the highest security available for programmable logic designs.  
Single Chip  
Flash-based FPGAs store their configuration information in on-chip flash cells. Once programmed, the  
configuration data is an inherent part of the FPGA structure, and no external configuration data needs to  
be loaded at system power-up (unlike SRAM-based FPGAs). Therefore, flash-based SmartFusion  
cSoCs do not require system configuration components such as electrically erasable programmable  
read-only memories (EEPROMs) or microcontrollers to load device configuration data during power-up.  
This reduces bill-of-materials costs and PCB area, and increases system security and reliability.  
Instant On  
Flash-based SmartFusion cSoCs are Instant On. Instant On SmartFusion cSoCs greatly simplify total  
system design and reduce total system cost by eliminating the need for complex programmable logic  
devices (CPLDs). SmartFusion Instant On clocking (PLLs) replace off-chip clocking resources. In  
addition, glitches and brownouts in system power will not corrupt the SmartFusion flash configuration.  
Unlike SRAM-based FPGAs, the device will not have to be reloaded when system power is restored.  
This enables reduction or complete removal of expensive voltage monitor and brownout detection  
1-2  
Revision 10  

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