A29L160B Series
2M X 8 Bit / 1M X 16 Bit CMOS 3.3 Volt-only,
Boot Sector Flash Memory
Features
Single power supply operation
- Regulated voltage range: 2.7 to 3.6 volt read and write
operations for compatibility with high performance 3.3
volt microprocessors
Access times:
- 70ns (max.)
Current:
-
Embedded Program algorithm automatically writes and
verifies data at specified addresses
Minimum 100,000 program/erase cycles per sector
20-year data retention 125°C
- Reliable operation for the life of the system
CFI (Common Flash Interface) compliant
- Provides device-specific information to the system,
allowing host software to easily reconfigure for different
Flash devices
- 15mA typical active read current
- 30mA typical program/erase current
- 3μA typical CMOS standby
Compatible with JEDEC-standards
- Pinout and software compatible with single-power-supply
Flash memory standard
- Superior inadvertent write protection
- 3μA Automatic Sleep Mode current
Flexible sector architecture
- 16 Kbyte/ 8 KbyteX2/ 32 Kbyte/ 64 KbyteX31 sectors
- 8 Kword/ 4 KwordX2/ 16 Kword/ 32 KwordX31 sectors
- Any combination of sectors can be erased
- Supports full chip erase
Polling and toggle bits
Data
- Provides a software method of detecting completion of
program or erase operations
- Sector protection:
Ready /
pin (RY /
)
BY
BUSY
A hardware method of protecting sectors to prevent any
inadvertent program or erase operations within that
sector. Temporary Sector Unprotect feature allows code
changes in previously locked sectors
- Provides a hardware method of detecting completion of
program or erase operations
Erase Suspend/Erase Resume
- Suspends a sector erase operation to read data from, or
program data to, a non-erasing sector, then resumes the
erase operation
Unlock Bypass Program Command
- Reduces overall programming time when issuing
multiple program command sequence
Top or bottom boot block configurations available
Embedded Algorithms
Hardware reset pin (
)
RESET
- Hardware method to reset the device to reading array
data
Package options
- Embedded Erase algorithm will automatically erase the
entire chip or any combination of designated sectors and
verify the erased sectors
- 48-pin TSOP (I) or 48-ball TFBGA
- All Pb-free (Lead-free) products are RoHS2.0 compliant
General Description
The A29L160B is a 16Mbit, 3.3 volt-only Flash memory
organized as 2,097,152 bytes of 8 bits or 1,048,576 words of
16 bits each. The 8 bits of data appear on I/O0 - I/O7; the 16
bits of data appear on I/O0~I/O15. The A29L160B is offered in
48-ball FBGA and 48-Pin TSOP packages. This device is
designed to be programmed in-system with the standard
system 3.3 volt VCC supply. Additional 12.0 volt VPP is not
required for in-system write or erase operations. However,
the A29L160B can also be programmed in standard EPROM
programmers.
The A29L160B has the first toggle bit, I/O6, which indicates
whether an Embedded Program or Erase is in progress, or it
is in the Erase Suspend. Besides the I/O6 toggle bit, the
A29L160B has a second toggle bit, I/O2, to indicate whether
the addressed sector is being selected for erase. The
A29L160B also offers the ability to program in the Erase
Suspend mode. The standard A29L160B offers access times
of 70ns, allowing high-speed microprocessors to operate
without wait states. To eliminate bus contention the device
has separate chip enable (
), write enable (
) and
WE
CE
output enable (
) controls.
OE
The device requires only a single 3.3 volt power supply for
both read and write functions. Internally generated and
regulated voltages are provided for the program and erase
operations.
The A29L160B is entirely software command set compatible
with the JEDEC single-power-supply Flash standard.
Commands are written to the command register using
standard microprocessor write timings. Register contents
serve as input to an internal state-machine that controls the
erase and programming circuitry. Write cycles also internally
latch addresses and data needed for the programming and
erase operations. Reading data out of the device is similar to
reading from other Flash or EPROM devices.
Device programming occurs by writing the proper program
command sequence. This initiates the Embedded Program
algorithm - an internal algorithm that automatically times the
program pulse widths and verifies proper program margin.
(August, 2014, Version 1.2)
1
AMIC Technology, Corp.
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