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A29L004UW-70F PDF预览

A29L004UW-70F

更新时间： 2024-02-13 03:49:44
品牌 Logo 应用领域
联笙电子 - AMICC 光电二极管内存集成电路
页数 文件大小 规格书
40页 519K
描述
Flash, 512KX8, 70ns, PDSO40, 10 X 20 MM, ROHS COMPLIANT, TSOP1-40

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A29L004UW-70F 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：TSOP1包装说明：10 X 20 MM, ROHS COMPLIANT, TSOP1-40
针数：40Reach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.32.00.51
风险等级：5.66最长访问时间：70 ns
其他特性：BOTTOM BOOT SECTOR启动块：BOTTOM
命令用户界面：YES数据轮询：YES
耐久性：100000 Write/Erase CyclesJESD-30 代码：R-PDSO-G40
长度：18.4 mm内存密度：4194304 bit
内存集成电路类型：FLASH内存宽度：8
功能数量：1部门数/规模：1,2,1,7
端子数量：40字数：524288 words
字数代码：512000工作模式：ASYNCHRONOUS
最高工作温度：70 °C最低工作温度：
组织：512KX8封装主体材料：PLASTIC/EPOXY
封装代码：TSOP1封装等效代码：TSSOP40,.8,20
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE
并行/串行：PARALLEL峰值回流温度（摄氏度）：NOT SPECIFIED
电源：3/3.3 V编程电压：3 V
认证状态：Not Qualified就绪/忙碌：YES
座面最大高度：1.2 mm部门规模：16K,8K,32K,64K
最大待机电流：0.000005 A子类别：Flash Memories
最大压摆率：0.03 mA最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2.7 V标称供电电压 (Vsup)：3 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED切换位：YES
类型：NOR TYPE宽度：10 mm
Base Number Matches：1

A29L004UW-70F 数据手册

 浏览型号A29L004UW-70F的Datasheet PDF文件第6页浏览型号A29L004UW-70F的Datasheet PDF文件第7页浏览型号A29L004UW-70F的Datasheet PDF文件第8页浏览型号A29L004UW-70F的Datasheet PDF文件第10页浏览型号A29L004UW-70F的Datasheet PDF文件第11页浏览型号A29L004UW-70F的Datasheet PDF文件第12页 
A29L004 Series  
Sector Protection/Unprotection  
Temporary Sector Unprotect (N/A on 32-pin DIP,  
PLCC & (s)TSOP packages)  
The hardware sector protection feature disables both  
program and erase operations in any sector. The hardware  
sector unprotection feature re-enables both program and  
erase operations in previously protected sectors.  
It is possible to determine whether a sector is protected or  
unprotected. See “Autoselect Mode” for details.  
This feature allows temporary unprotection of previous  
protected sectors to change data in-system. The Sector  
Unprotect mode is activated by setting the  
pin to VID.  
RESET  
During this mode, formerly protected sectors can be  
programmed or erased by selecting the sector addresses.  
Sector protection / unprotection can be implemented via two  
methods. The primary method requires VID on the  
Once VID is removed from the  
pin, all the previously  
RESET  
protected sectors are protected again. Figure 1 shows the  
algorithm, and the Temporary Sector Unprotect diagram  
shows the timing waveforms, for this feature.  
pin only (N/A on 32-pin DIP, PLCC & (s)TSOP  
RESET  
packages), and can be implemented either in-system or via  
programming equipment. Figure 2 shows the algorithm and  
the Sector Protect / Unprotect Timing Diagram illustrates the  
timing waveforms for this feature. This method uses standard  
microprocessor bus cycle timing. For sector unprotect, all  
unprotected sectors must first be protected prior to the first  
sector unprotect write cycle. The alternate method must be  
implemented using programming equipment. The procedure  
requires a high voltage (VID) on address pin A9 and the  
control pins.  
START  
RESET = VID  
(Note 1)  
The device is shipped with all sectors unprotected.  
It is possible to determine whether a sector is protected or  
unprotected. See "Autoselect Mode" for details.  
Hardware Data Protection  
Perform Erase or  
Program Operations  
The requirement of command unlocking sequence for  
programming or erasing provides data protection against  
inadvertent writes (refer to the Command Definitions table).  
In addition, the following hardware data protection measures  
prevent accidental erasure or programming, which might  
otherwise be caused by spurious system level signals during  
VCC power-up transitions, or from system noise. The device  
is powered up to read array data to avoid accidentally writing  
data to the array.  
RESET = VIH  
Write Pulse "Glitch" Protection  
Temporary Sector  
Unprotect  
Completed (Note 2)  
Noise pulses of less than 5ns (typical) on  
do not initiate a write cycle.  
,
or  
OE CE  
WE  
Logical Inhibit  
Notes:  
Write cycles are inhibited by holding any one of  
=VIL,  
OE  
CE  
1. All protected sectors unprotected.  
2. All previously protected sectors are protected once again.  
= VIH or  
= VIH. To initiate a write cycle,  
and  
WE  
CE  
must be a logical zero while  
is a logical one.  
WE  
OE  
Figure 1. Temporary Sector Unprotect Operation  
Power-Up Write Inhibit  
If  
=
= VIL and  
= VIH during power up, the  
OE  
WE  
device does not accept commands on the rising edge of  
. The internal state machine is automatically reset to  
CE  
WE  
reading array data on the initial power-up.  
(November, 2010, Version 1.7)  
8
AMIC Technology, Corp.  
1...6789101112...40

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