Datasheet > A29400UM-90

A29400UM-90

更新时间： 2024-02-20 17:48:34

品牌	Logo	应用领域
联笙电子 - AMICC		闪存
页数	文件大小	规格书
33页	499K
描述
512K X 8 Bit / 256K X 16 Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory

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A29400UM-90 数据手册

A29400 Series

Timing Waveforms for Alternate

Controlled Write Operation (

=VIH on A29400)

RESET

PA for program

SA for sector erase

555 for chip erase

555 for program

2AA for erase

Data Polling

Addresses

tWC

tAS

tAH

tWH

tGHEL

tWHWH1 or 2

tCP

tBUSY

tCPH

tDH

tWS

tDS

Data

DOUT

I/O7

tRH

A0 for program

55 for erase

PD for program

30 for sector erase

10 for chip erase

RESET

RY/BY

Note :

1. PA = Program Address, PD = Program Data, SA = Sector Address, I/O7 = Complement of Data Input, DOUT = Array Data.

2. Figure indicates the last two bus cycles of the command sequence.

Erase and Programming Performance

Parameter

Sector Erase Time

Typ. (Note 1)

Max. (Note 2)

Unit

sec

Comments

1.0

Excludes 00h programming

prior to erasure

Chip Erase Time

Byte Programming Time

Word Programming Time

300

500

Excludes system-level

overhead (Note 5)

Chip Programming Time

(Note 3)

Byte Mode

Word Mode

3.6

3.1

10.8

9.3

sec

Notes:

1. Typical program and erase times assume the following conditions: 25°C, 5.0V VCC, 10,000 cycles. Additionally,

programming typically assumes checkerboard pattern.

2. Under worst case conditions of 90°C, VCC = 4.5V (4.75V for -55), 100,000 cycles.

3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most

bytes program faster than the maximum byte program time listed. If the maximum byte program time given is exceeded,

only then does the device set I/O5 = 1. See the section on I/O5 for further information.

4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.

5. System-level overhead is the time required to execute the four-bus-cycle command sequence for programming. See

Table 4 for further information on command definitions.

6. The device has a guaranteed minimum erase and program cycle endurance of 10,000 cycles.

PRELIMINARY

(February, 2001, Version 0.1)

AMIC Technology, Inc.

1...25 26 272829 30 31...33

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