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A29040B-90U

更新时间： 2024-01-11 08:02:30
品牌 Logo 应用领域
联笙电子 - AMICC /
页数 文件大小 规格书
29页 388K
描述
512K X 8 Bit CMOS 5.0 Volt-only, Uniform Sector Flash Memory

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A29040B-90U 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Contact Manufacturer零件包装代码：DIP
包装说明：DIP, DIP32,.6针数：32
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.32.00.51风险等级：5.54
最长访问时间：90 ns其他特性：UNIFORM SECTOR
命令用户界面：YES数据轮询：YES
耐久性：100000 Write/Erase CyclesJESD-30 代码：R-PDIP-T32
长度：41.91 mm内存密度：4194304 bit
内存集成电路类型：FLASH内存宽度：8
功能数量：1部门数/规模：8
端子数量：32字数：524288 words
字数代码：512000工作模式：ASYNCHRONOUS
最高工作温度：85 °C最低工作温度：-40 °C
组织：512KX8输出特性：3-STATE
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装等效代码：DIP32,.6封装形状：RECTANGULAR
封装形式：IN-LINE并行/串行：PARALLEL
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5 V
编程电压：5 V认证状态：Not Qualified
座面最大高度：5.334 mm部门规模：64K
最大待机电流：0.000005 A子类别：Flash Memories
最大压摆率：0.04 mA最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：NO技术：CMOS
温度等级：INDUSTRIAL端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED切换位：YES
类型：NOR TYPE宽度：15.24 mm
Base Number Matches：1

A29040B-90U 数据手册

 浏览型号A29040B-90U的Datasheet PDF文件第5页浏览型号A29040B-90U的Datasheet PDF文件第6页浏览型号A29040B-90U的Datasheet PDF文件第7页浏览型号A29040B-90U的Datasheet PDF文件第9页浏览型号A29040B-90U的Datasheet PDF文件第10页浏览型号A29040B-90U的Datasheet PDF文件第11页 
A29040B Series  
system may once again read array data with the same  
exception. See "Erase Suspend/Erase Resume Commands"  
for more information on this mode.  
The system must issue the reset command to re-enable the  
device for reading array data if I/O5 goes high, or while in the  
autoselect mode. See the "Reset Command" section, next.  
See also "Requirements for Reading Array Data" in the  
"Device Bus Operations" section for more information. The  
Read Operations table provides the read parameters, and  
Read Operation Timings diagram shows the timing diagram.  
required to provide further controls or timings. The device  
automatically provides internally generated program pulses  
and verify the programmed cell margin. The Command  
Definitions table shows the address and data requirements  
for the byte program command sequence.  
When the Embedded Program algorithm is complete, the  
device then returns to reading array data and addresses are  
no longer latched. The system can determine the status of  
the program operation by using I/O7 or I/O6. See "Write  
Operation Status" for information on these status bits.  
Any commands written to the device during the Embedded  
Program Algorithm are ignored. Programming is allowed in  
any sequence and across sector boundaries. A bit cannot be  
programmed from a "0" back to a "1 ". Attempting to do so  
may halt the operation and set I/O5 to "1", or cause the  
Reset Command  
Writing the reset command to the device resets the device to  
reading array data. Address bits are don't care for this  
command. The reset command may be written between the  
sequence cycles in an erase command sequence before  
erasing begins. This resets the device to reading array data.  
Once erasure begins, however, the device ignores reset  
commands until the operation is complete.  
Polling algorithm to indicate the operation was  
Data  
successful. However, a succeeding read will show that the  
data is still "0". Only erase operations can convert a "0" to a  
"1".  
The reset command may be written between the sequence  
cycles in  
a
program command sequence before  
START  
programming begins. This resets the device to reading array  
data (also applies to programming in Erase Suspend mode).  
Once programming begins, however, the device ignores  
reset commands until the operation is complete.  
The reset command may be written between the sequence  
cycles in an autoselect command sequence. Once in the  
autoselect mode, the reset command must be written to  
return to reading array data (also applies to autoselect  
during Erase Suspend).  
Write Program  
Command  
Sequence  
If I/O5 goes high during a program or erase operation, writing  
the reset command returns the device to reading array data  
(also applies during Erase Suspend).  
Data Poll  
from System  
Embedded  
Program  
algorithm in  
progress  
Autoselect Command Sequence  
The autoselect command sequence allows the host system  
to access the manufacturer and devices codes, and  
determine whether or not a sector is protected. The  
Command Definitions table shows the address and data  
requirements. This method is an alternative to that shown in  
the Autoselect Codes (High Voltage Method) table, which is  
intended for PROM programmers and requires VID on  
address bit A9.  
Verify Data ?  
No  
Yes  
The autoselect command sequence is initiated by writing two  
unlock cycles, followed by the autoselect command. The  
device then enters the autoselect mode, and the system  
may read at any address any number of times, without  
initiating another command sequence.  
A read cycle at address XX00h retrieves the manufacturer  
code and another read cycle at XX03h retrieves the  
continuation code. A read cycle at address XX01h returns  
the device code. A read cycle containing a sector address  
(SA) and the address 02h in returns 01h if that sector is  
protected, or 00h if it is unprotected. Refer to the Sector  
Address tables for valid sector addresses.  
Increment Address  
Last Address ?  
Yes  
Programming  
Completed  
The system must write the reset command to exit the  
autoselect mode and return to reading array data.  
Note : See the appropriate Command Definitions table for  
program command sequence.  
Byte Program Command Sequence  
Figure 1. Program Operation  
Programming is a four-bus-cycle operation. The program  
command sequence is initiated by writing two unlock write  
cycles, followed by the program set-up command. The  
program address and data are written next, which in turn  
initiate the Embedded Program algorithm. The system is not  
PRELIMINARY  
(December, 2004, Version 0.2)  
7
AMIC Technology, Corp.  
1...567891011...29

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