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A25L10PUO-UF

更新时间： 2024-02-23 20:53:51
品牌 Logo 应用领域
联笙电子 - AMICC 闪存
页数 文件大小 规格书
43页 544K
描述
2Mbit / 1Mbit / 512Kbit, Low Voltage, Serial Flash Memory With 85MHz SPI Bus Interface

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A25L10PUO-UF 技术参数

是否Rohs认证：符合生命周期：Obsolete
包装说明：DIP, DIP8,.3Reach Compliance Code：unknown
风险等级：5.84Is Samacsys：N
最大时钟频率 (fCLK)：50 MHz耐久性：100000 Write/Erase Cycles
JESD-30 代码：R-PDIP-T8内存密度：1048576 bit
内存集成电路类型：FLASH内存宽度：8
端子数量：8字数：131072 words
字数代码：128000最高工作温度：85 °C
最低工作温度：-40 °C组织：128KX8
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装等效代码：DIP8,.3封装形状：RECTANGULAR
封装形式：IN-LINE并行/串行：SERIAL
电源：3/3.3 V认证状态：Not Qualified
串行总线类型：SPI最大待机电流：0.00005 A
子类别：Flash Memories最大压摆率：0.02 mA
表面贴装：NO技术：CMOS
温度等级：INDUSTRIAL端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
类型：NOR TYPE写保护：HARDWARE/SOFTWARE
Base Number Matches：1

A25L10PUO-UF 数据手册

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A25L20P/A25L10P/A25L05P Series  
2Mbit / 1Mbit / 512Kbit, Low Voltage, Serial Flash Memory  
With 85MHz SPI Bus Interface  
FEATURES  
„ 2Mbit / 1Mbit / 512Kbit of Flash Memory  
„ Flexible Sector Architecture  
- 25L20P: (4/4/8/16/32)KB/64x3 KB  
- 25L10P: (4/4/8/16/32)KB/64x1KB  
- 25L05P: (4/4/8/16/32)KB  
„ Top or Bottom boot block configuration available  
„ Electronic Signatures  
- JEDEC Standard Two-Byte Signature  
A25L20P: (2012h, Bottom) or (2022h, top)  
A25L10P: (2011h, Bottom) or (2021h, top)  
A25L05P: (2010h, Bottom) or (2020h, top)  
- RES Instruction, One-Byte, Signature, for backward  
compatibility  
„ Bulk Erase (typical)  
- 25L20P (2M) in 6s  
- A25L10P (1M) in 4s  
- A25L05P (512K) in 3s  
A25L20P (11h)  
„ Sector Erase (512 Kbit) in 1s (typical)  
„ Page Program (up to 256 Bytes) in 3ms (typical)  
„ 2.7 to 3.6V Single Supply Voltage  
„ SPI Bus Compatible Serial Interface  
„ 85MHz Clock Rate (maximum)  
„ Deep Power-down Mode 1µA (typical)  
A25L10P (10h)  
A25L05P (05h)  
„ Package options  
- 8-pin SOP (150mil or 209mil), 8-pin DIP (300mil) or 8-pin  
QFN  
- All Pb-free (Lead-free) products are RoHS compliant  
GENERAL DESCRIPTION  
The A25L20P/A25L10P/A25L05P are 2M/1M/512 bit Serial  
Flash Memory, with advanced write protection mechanisms,  
accessed by a high speed SPI-compatible bus.  
pages. Each page is 256 bytes wide. Thus, the whole memory  
can be viewed as consisting of 1024/512/256 pages, or 262,144  
/131,072/65,536 bytes.  
The whole memory can be erased using the Bulk Erase  
instruction, or a sector at a time, using the Sector Erase  
instruction.  
The memory can be programmed 1 to 256 bytes at a time, using  
the Page Program instruction.  
The memory is organized as 4/2/1 sectors, each containing 256  
Pin Configurations  
„ SO8 Connections  
„ DIP8 Connections  
„ QFN8 Connections  
A25L20P/  
A25L10P/  
A25L05P  
A25L20P/  
A25L10P/  
A25L05P  
A25L20P/  
A25L10P/  
A25L05P  
VCC  
VCC  
VCC  
1
8
S
DO  
S
DO  
S
DO  
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
HOLD  
C
DIO  
HOLD  
C
DIO  
HOLD  
C
DIO  
2
3
4
7
6
5
W
VSS  
W
VSS  
W
VSS  
(August, 2007, Version 1.0)  
1
AMIC Technology Corp.  
1234567...43

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