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ADCMP567BCPZ PDF预览

ADCMP567BCPZ

更新时间: 2024-01-10 02:25:33
品牌 Logo 应用领域
亚德诺 - ADI 比较器
页数 文件大小 规格书
17页 448K
描述
ADCMP567BCPZ

ADCMP567BCPZ 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFN
包装说明:HVQCCN,针数:32
Reach Compliance Code:unknown风险等级:5.43
放大器类型:COMPARATOR最大平均偏置电流 (IIB):42 µA
最大输入失调电压:5000 µVJESD-30 代码:S-XQCC-N32
JESD-609代码:e3长度:5 mm
湿度敏感等级:3负供电电压上限:-6 V
标称负供电电压 (Vsup):-5.2 V功能数量:2
端子数量:32最高工作温度:85 °C
最低工作温度:-40 °C输出类型:OPEN-EMITTER
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260认证状态:COMMERCIAL
标称响应时间:0.3 ns座面最大高度:1 mm
子类别:Comparator供电电压上限:6 V
标称供电电压 (Vsup):5 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:5 mmBase Number Matches:1

ADCMP567BCPZ 数据手册

 浏览型号ADCMP567BCPZ的Datasheet PDF文件第2页浏览型号ADCMP567BCPZ的Datasheet PDF文件第3页浏览型号ADCMP567BCPZ的Datasheet PDF文件第4页浏览型号ADCMP567BCPZ的Datasheet PDF文件第5页浏览型号ADCMP567BCPZ的Datasheet PDF文件第6页浏览型号ADCMP567BCPZ的Datasheet PDF文件第7页 
Dual Ultrafast  
Voltage Comparator  
ADCMP567  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
250 ps propagation delay input to output  
50 ps propagation delay dispersion  
Differential PECL compatible outputs  
Differential latch control  
NONINVERTING  
INPUT  
Q OUTPUT  
Q OUTPUT  
ADCMP567  
INVERTING  
INPUT  
Robust input protection  
Input common-mode range −2.0 V to +3.0 V  
Input differential range 5 V  
LATCH ENABLE  
INPUT  
LATCH ENABLE  
INPUT  
ESD protection >3 kV HBM, >200 V MM  
Power supply sensitivity >65 dB  
200 ps minimum pulsewidth  
03632-0-001  
Figure 1.  
5 GHz equivalent input rise time bandwidth  
Typical output rise/fall of 165 ps  
GENERAL DESCRIPTION  
The ADCMP567 is an ultrafast voltage comparator fabricated  
on Analog Devices’ proprietary XFCB process. The device  
features 250 ps propagation delay with less than 35 ps overdrive  
dispersion. Overdrive dispersion, a particularly important  
characteristic of high speed comparators, is a measure of the  
difference in propagation delay under differing overdrive  
conditions.  
APPLICATIONS  
High speed instrumentation  
Scope and logic analyzer front ends  
Window comparators  
High speed line receivers and signal restoration  
Threshold detection  
Peak detection  
High speed triggers  
Patient diagnostics  
Disk drive read channel detection  
Hand-held test instruments  
Zero-crossing detectors  
Clock drivers  
A fast, high precision differential input stage permits consis-  
tent propagation delay with a wide variety of signals in the  
common-mode range from −2.0 V to +3.0 V. Outputs are  
complementary digital signals fully compatible with PECL 10 K  
and 10 KH logic families. The outputs provide sufficient drive  
current to directly drive transmission lines terminated in 50 Ω  
to VDD − 2 V. A latch input is included, which permits tracking,  
track-and-hold, or sample-and-hold modes of operation.  
Automatic test equipment  
The ADCMP567 is available in a 32-lead LFCSP package.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable.  
However, no responsibility is assumed by Analog Devices for its use, nor for any  
infringements of patents or other rights of third parties that may result from its use.  
Specifications subject to change without notice. No license is granted by implication  
or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.326.8703  
www.analog.com  
© 2003 Analog Devices, Inc. All rights reserved.  

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