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93LC46-I/MS PDF预览

93LC46-I/MS

更新时间: 2024-01-21 00:59:29
品牌 Logo 应用领域
美国微芯 - MICROCHIP 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
页数 文件大小 规格书
20页 510K
描述
64 X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8, PLASTIC, MSOP-8

93LC46-I/MS 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:MSOP
包装说明:PLASTIC, MSOP-8针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:5.42
备用内存宽度:8最大时钟频率 (fCLK):2 MHz
JESD-30 代码:S-PDSO-G8JESD-609代码:e3
长度:3 mm内存密度:1024 bit
内存集成电路类型:EEPROM内存宽度:16
湿度敏感等级:1功能数量:1
端子数量:8字数:64 words
字数代码:64工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:64X16封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:SQUARE
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH并行/串行:SERIAL
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:1.18 mm串行总线类型:MICROWIRE
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2.5 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:3 mm
Base Number Matches:1

93LC46-I/MS 数据手册

 浏览型号93LC46-I/MS的Datasheet PDF文件第2页浏览型号93LC46-I/MS的Datasheet PDF文件第3页浏览型号93LC46-I/MS的Datasheet PDF文件第4页浏览型号93LC46-I/MS的Datasheet PDF文件第6页浏览型号93LC46-I/MS的Datasheet PDF文件第7页浏览型号93LC46-I/MS的Datasheet PDF文件第8页 
93XX46, 93XX46A/B  
2.2  
Data In/Data Out (DI/DO)  
2.0  
FUNCTIONAL DESCRIPTION  
It is possible to connect the Data In and Data Out pins  
together. However, with this configuration it is possible  
for a “bus conflict” to occur during the “dummy zero”  
that precedes the READ operation, if A0 is a logic  
HIGH level. Under such a condition the voltage level  
seen at Data Out is undefined and will depend upon the  
relative impedances of Data Out and the signal source  
driving A0. The higher the current sourcing capability of  
A0, the higher the voltage at the Data Out pin.  
When the ORG* pin is connected to VCC, the (x16)  
organization is selected. When it is connected to  
ground, the (x8) organization is selected. Instructions,  
addresses and write data are clocked into the DI pin on  
the rising edge of the clock (CLK). The DO pin is nor-  
mally held in a high-Z state except when reading data  
from the device, or when checking the READY/BUSY  
status during a programming operation. The ready/  
busy status can be verified during an Erase/Write oper-  
ation by polling the DO pin; DO low indicates that pro-  
gramming is still in progress, while DO high indicates  
the device is ready. The DO will enter the high-Z state  
on the falling edge of the CS.  
2.3  
Data Protection  
During power-up, all programming modes of operation  
are inhibited until VCC exceeds a typical voltage level of  
1.5V for 'AA' and 'LC' devices or 3.8V for 'C' devices.  
2.1  
START Condition  
During power-down, the source data protection cir-  
cuitry acts to inhibit all programming modes when VCC  
falls below 1.4V for 'AA' and 'LC' devices or 3.5V for 'C'  
devices.  
The START bit is detected by the device if CS and DI  
are both HIGH with respect to the positive edge of CLK  
for the first time.  
Before a START condition is detected, CS, CLK, and DI  
may change in any combination (except to that of a  
START condition), without resulting in any device oper-  
ation (READ, WRITE, ERASE, EWEN, EWDS, ERAL,  
and WRAL). As soon as CS is HIGH, the device is no  
longer in the Standby mode.  
The EWEN and EWDS commands give additional  
protection against accidentally programming during  
normal operation.  
After power-up, the device is automatically in the  
EWDS mode. Therefore, an EWENinstruction must be  
performed before any ERASEor WRITEinstruction can  
be executed.  
An instruction following a START condition will only be  
executed if the required amount of opcode, address  
and data bits for any particular instruction is clocked in.  
After execution of an instruction (i.e., clock in or out of  
the last required address or data bit) CLK and DI  
become don't care bits until a new START condition is  
detected.  
*Org pin is not available on A/B devices  
2002 Microchip Technology Inc.  
DS21749A-page 5  

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