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8XC196NT

更新时间： 2024-02-12 20:48:06
品牌 Logo 应用领域
英特尔 - INTEL 双倍数据速率
页数 文件大小 规格书
31页 485K
描述
CHMOS MICROCONTROLLER WITH 1 MBYTE LINEAR ADDRESS SPACE

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8XC196NT 数据手册

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8XC196NT  
CHMOS MICROCONTROLLER WITH  
1 MBYTE LINEAR ADDRESS SPACE  
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
20 MHz Operation  
Oscillator Fail Detection Circuitry  
Y
Y
High Performance CHMOS 16-Bit CPU  
Up to 32 Kbytes of On-Chip OTPROM  
Up to 1 Kbyte of On-Chip Register RAM  
Up to 512 Bytes of Internal RAM  
Register-Register Architecture  
High Speed Peripheral Transaction  
Server (PTS)  
Two Dedicated 16-Bit High-Speed  
Compare Registers  
Y
Y
10 High Speed Capture/Compare (EPA)  
Full Duplex Synchronous Serial I/O  
Port (SSIO)  
4 Channel/10-Bit A/D with Sample/Hold  
37 Prioritized Interrupt Sources  
Up to Seven 8-Bit (56) I/O Ports  
Full Duplex Serial I/O Port  
Y
Y
Y
Two Flexible 16-Bit Timer/Counters  
Quadrature Counting Inputs  
Flexible 8-/16-Bit External Bus  
(Programmable)  
Dedicated Baud Rate Generator  
Y
Y
Y
Y
Programmable Bus (HOLD/HLDA)  
1.4 ms 16 x 16 Multiply  
2.4 ms 32/16 Divide  
Interprocessor Communication Slave  
Port  
Y
Selectable Bus Timing Modes for  
Flexible External Memory Interfacing  
68-Pin Package  
Reg  
Code  
RAM  
Address  
Space  
Device  
Pins/Package  
OTPROM  
I/O  
EPA  
A/D  
RAM  
8XC196NT  
68P PLCC  
32K  
1K  
512  
1 Mbyte  
56  
10  
4
e
e
X
X
7 OTPROM Device  
0 ROMLESS  
The 8XC196NT 16-bit microcontroller is a high performance member of the MCS 96 microcontroller family.  
É
The 8XC196NT is an enhanced 8XC196KR device with 1 Mbyte of linear address space, 1000 bytes of  
register RAM, 512 bytes of internal RAM, 20 MHz operation and an optional 32 Kbytes of OTPROM. Intel’s  
CHMOS III-E process provides a high performance processor along with low power consumption.  
Ten high-speed capture/compare modules are provided. As capture modules event times with 200 ns resolu-  
tion can be recorded and generate interrupts. As compare modules events such as toggling of a port pin,  
starting an A/D conversion, pulse width modulation, and software timers can be generated. Events can be  
based on the timer or up/down counter.  
*Other brands and names are the property of their respective owners.  
Information in this document is provided in connection with Intel products. Intel assumes no liability whatsoever, including infringement of any patent or  
copyright, for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products. Intel retains the right to make  
changes to these specifications at any time, without notice. Microcomputer Products may have minor variations to this specification known as errata.  
©
COPYRIGHT INTEL CORPORATION, 1995  
September 1994  
Order Number: 272267-004  
1234567...31

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