Philips Semiconductors
Product specification
80C51 8-bit microcontrollers
87C524/87C528
16K/32K, 512 OTP, I2C, watchdog timer
FEATURES
• 80C51 instruction set
– 512 × 8 RAM
– Memory addressing capability
64k ROM and 64k RAM
– Three 16-bit counter/timers
– On-chip watchdog timer with oscillator
– Full duplex UART
2
– I C serial interface
DESCRIPTION
• Power control modes:
– Idle mode
The 87C528 single-chip 8-bit microcontroller is manufactured in an
advanced CMOS process and is a derivative of the 80C51
microcontroller family. The 87C528 has the same instruction set as
the 80C51. Three versions of the derivative exist:
– Power-down mode
– Warm start from power-down
• 83C528—32k bytes ROM
• 83C524—16k bytes ROM
• 80C528—ROMless version of the 83C528
• 87C528—32k bytes EPROM
• 83C524—16k bytes EPROM
• CMOS and TTL compatible
• Extended temperature ranges
• EPROM code protection
• OTP package available
• 16 MHz speed at V = 5 V
CC
This device provides architectural enhancements that make it
applicable in a variety of applications in consumer, telecom and
general control systems, especially in those systems which need
large ROM and RAM capacity on-chip.
The 87C528 contains a 32k × 8 EPROM and the 87C524 contains a
16k x 8 EPROM. Both devices have a 512 × 8 RAM, four 8-bit I/O
ports, two 16-bit timer/event counters (identical to the timers of the
80C51), a 16-bit timer (identical to the timer 2 of the 80C52), a
watchdog timer with a separate oscillator, a multi-source,
two-priority-level, nested interrupt structure, two serial interfaces
2
(UART and I C-bus), and on-chip oscillator and timing circuits.
In addition, the 87C524/87C528 has two software selectable modes
of power reduction—idle mode and power-down mode. The idle
mode freezes the CPU while allowing the RAM, timers, serial port,
and interrupt system to continue functioning. The power-down mode
saves the RAM contents but freezes the oscillator, causing all other
chip functions to be inoperative.
ORDERING INFORMATION
o
TEMPERATURE C RANGE
FREQ
(MHz)
Drawing
Number
EPROM
AND PACKAGE
P87C528EBP N
P87C528EBA A
P87C528EBB B
P87C528EFP N
P87C528EFB B
P87C524EBA A
0 to +70, Plastic Dual In-line Package
16
16
16
16
16
16
16
SOT129-1
SOT187-2
SOT307-2
SOT129-1
SOT307-2
SOT187-2
SOT307-2
0 to +70, Plastic Leaded Chip Carrier
0 to +70, Plastic Quad Flat Pack
–40 to +85, Plastic Dual In-line Package
–40 to +85, Plastic Quad Flat Pack
0 to +70, Plastic Leaded Chip Carrier
0 to +70, Plastic Quad Flat Pack
P87C524EBB B
NOTE:
1. For ROM & ROMless devices, see data sheet P8X524/528.
2
1999 Jul 23
853-1687 22041