5秒后页面跳转
874003BG-05LF PDF预览

874003BG-05LF

更新时间: 2024-01-27 11:00:19
品牌 Logo 应用领域
艾迪悌 - IDT 衰减器PC
页数 文件大小 规格书
18页 803K
描述
PCI EXPRESS™ JITTER ATTENUATOR

874003BG-05LF 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Lifetime Buy零件包装代码:TSSOP
包装说明:6.50 X 4.40 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-20针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.44
系列:5V输入调节:STANDARD
JESD-30 代码:R-PDSO-G20JESD-609代码:e3
长度:6.5 mm逻辑集成电路类型:PLL BASED CLOCK DRIVER
湿度敏感等级:1功能数量:1
反相输出次数:3端子数量:20
实输出次数:3最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.145 ns
座面最大高度:1.2 mm最大供电电压 (Vsup):3.465 V
最小供电电压 (Vsup):3.135 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:COMMERCIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:4.4 mm
最小 fmax:98 MHzBase Number Matches:1

874003BG-05LF 数据手册

 浏览型号874003BG-05LF的Datasheet PDF文件第2页浏览型号874003BG-05LF的Datasheet PDF文件第3页浏览型号874003BG-05LF的Datasheet PDF文件第4页浏览型号874003BG-05LF的Datasheet PDF文件第5页浏览型号874003BG-05LF的Datasheet PDF文件第6页浏览型号874003BG-05LF的Datasheet PDF文件第7页 
PCI EXPRESS™ JITTER ATTENUATOR  
ICS874003-05  
General Description  
Features  
The ICS874003-05 is a high performance  
Three differential LVDS output pairs  
One differential clock input  
S
IC  
Differential-to-LVDS Jitter Attenuator designed for  
use in PCI Express systems. In some PCI Express  
systems, such as those found in desktop PCs, the  
PCI Express clocks are generated from a low  
HiPerClockS™  
CLK/nCLK can accept the following differential input levels:  
LVPECL, LVDS, LVHSTL, HCSL, SSTL  
Input frequency range: 98MHz to 128MHz  
Output frequency range: 98MHz to 320MHz  
VCO range: 490MHz - 640MHz  
bandwidth, high phase noise PLL frequency synthesizer. In these  
systems, a jitter attenuator may be required to attenuate high  
frequency random and deterministic jitter components from the  
PLL synthesizer and from the system board. The ICS874003-05  
has a bandwidth of 6.2MHz with <1dB peaking, easily meeting  
PCI Express Gen2 PLL requirements.  
The ICS874003-05 uses IDT’s 3rd Generation FemtoClock™ PLL  
technology to achieve the lowest possible phase noise. The device  
is packaged in a 20 Lead TSSOP package, making it ideal for use  
in space constrained applications such as PCI Express add-in  
cards.  
Supports PCI-Express Spread-Spectrum Clocking  
High PLL bandwidth allows for better input tracking  
PCI Express (2.5 Gb/s) and Gen 2 (5 Gb/S) jitter compliant  
0°C to 70°C ambient operating temperature  
Full 3.3V operating supply  
Available in lead-free (RoHS 6) packages  
Pin Assignment  
QA1  
VDDO  
QA0  
1
2
20 nQA1  
F_SEL[2:0] Function Table  
19  
VDDO  
Inputs  
Outputs  
QA[0:1], nQA[0:1]  
3
4
18  
17  
QB0  
nQB0  
nQA0  
F_SEL2  
F_SEL1  
F_SEL0  
QB0, nQB0  
MR  
F_SEL0  
nc  
5
6
7
8
9
16 F_SEL2  
15  
14  
13  
OEB  
GND  
nCLK  
0 (default) 0 (default) 0 (default)  
÷2  
÷5  
÷4  
÷2  
÷2  
÷5  
÷4  
÷4  
÷2  
÷2  
÷2  
÷4  
÷5  
÷4  
÷5  
÷4  
VDDA  
F_SEL1  
1
0
1
0
1
0
1
0
1
1
0
0
1
1
0
0
0
1
1
1
1
12 CLK  
11  
OEA  
VDD 10  
ICS874003-05  
20-Lead TSSOP  
6.5mm x 4.4mm x 0.925mm package body  
G Package  
Top View  
IDT™ / ICS™ PCI EXPRESS™ JITTER ATTENUATOR  
1
ICS874003BG-05 REV. A APRIL 15, 2009  

与874003BG-05LF相关器件

型号 品牌 描述 获取价格 数据表
874003BG-05LFT IDT PCI EXPRESS™ JITTER ATTENUATOR

获取价格

874003DG-02 IDT PLL Based Clock Driver, 874003 Series, 3 True Output(s), 0 Inverted Output(s), PDSO20, 6.5

获取价格

874003DG-02T IDT PLL Based Clock Driver, 874003 Series, 3 True Output(s), 0 Inverted Output(s), PDSO20, 6.5

获取价格

874004AG IDT Clock Driver, 874004 Series, 4 True Output(s), 0 Inverted Output(s), PDSO24, 4.40 X 7.80 M

获取价格

874004AGT IDT Clock Driver, 874004 Series, 4 True Output(s), 0 Inverted Output(s), PDSO24, 4.40 X 7.80 M

获取价格

874005AG IDT PLL Based Clock Driver, 874005 Series, 5 True Output(s), 0 Inverted Output(s), PDSO24, 4.4

获取价格