Datasheet > 851010AYLFT

851010AYLFT

更新时间： 2024-02-17 09:47:26

品牌	Logo	应用领域
艾迪悌 - IDT		驱动逻辑集成电路
页数	文件大小	规格书
16页	298K
描述
1-to-10, Differential HCSL Fanout Buffer

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技术参数
数据手册

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851010AYLFT 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	TQFP
包装说明：	LQFP, QFP32,.35SQ,32	针数：	32
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.25
系列：	851010	输入调节：	DIFFERENTIAL
JESD-30 代码：	S-PQFP-G32	JESD-609代码：	e3
长度：	7 mm	逻辑集成电路类型：	LOW SKEW CLOCK DRIVER
湿度敏感等级：	3	功能数量：	1
反相输出次数：		端子数量：	32
实输出次数：	10	最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	LQFP	封装等效代码：	QFP32,.35SQ,32
封装形状：	SQUARE	封装形式：	FLATPACK, LOW PROFILE
峰值回流温度（摄氏度）：	260	电源：	3.3 V
Prop。Delay @ Nom-Sup：	2.7 ns	传播延迟（tpd）：	2.75 ns
认证状态：	Not Qualified	Same Edge Skew-Max（tskwd）：	0.165 ns
座面最大高度：	1.6 mm	子类别：	Clock Drivers
最大供电电压 (Vsup)：	3.465 V	最小供电电压 (Vsup)：	3.135 V
标称供电电压 (Vsup)：	3.3 V	表面贴装：	YES
温度等级：	COMMERCIAL	端子面层：	Matte Tin (Sn) - annealed
端子形式：	GULL WING	端子节距：	0.8 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	30
宽度：	7 mm	Base Number Matches：	1

851010AYLFT 数据手册

851010 Datasheet

AC Electrical Characteristics

Table 3. HCSL AC Characteristics, V_DD= 3.3V 5%, T_A= 0°C to 70°C

Symbol

f_MAX

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

MHz

Output Frequency

250

2.75

165

250

t_PD

Propagation Delay, NOTE 1

Output Skew; NOTE 2, 3

Part-to-Part Skew; NOTE 3, 4

Measured on at V_OX

1.5

tsk(o)

tsk(pp)

CLK = 200MHz, Integration

Range: 12kHz – 30MHz

tjit

Buffer Additive Phase Jitter, RMS

0.24

tsk(drift)

V_MAX

Output Drift; NOTE 5

140

850

150

Absolute Max Output Voltage; NOTE 6

Absolute Min Output Voltage; NOTE 6

ƒ 150MHz

500

V_MIN

-150

Absolute Crossing Voltage; 

NOTE 7, 8, 9

V_CROSS

250

550

140

Total Variation of V_CROSSover all

edges; NOTE 7, 8, 10

V_CROSS

t_R/ t_F

odc

Rise/Fall Edge Rate; NOTE 11, 12

Output Duty Cycle; NOTE 13

0.6

4.0

V/ns

NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is

mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium

has been reached under these conditions.

NOTE: Current adjust set for V_OH= 0.7V. Measurements refer to PCIEX outputs only.

NOTE: Characterized using an R_REFvalue of 950 resistor.

NOTE 1: Measured from the differential input cross point to the differential output crossing point.

NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the differential output

cross point.

NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.

NOTE 4: Defined as skew between outputs on different devices operating at the same supply voltage, same frequency, same temperature and

with equal load conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross point.

NOTE 5: Output Drift is measured as the change in the time placement of the differential cross point for each output on a given device due to

a change in temperature and supply voltage. Measured at the differential cross point.

NOTE 6: Measurement using R_REF= to 950, R_LOAD= to 50.

NOTE 7: Measurement taken from single-ended waveform.

NOTE 8: Measured at crossing point where the instantaneous voltage value of the rising edge of Qx equals the falling edge of nQx.

See Parameter Measurement Information Section.

NOTE 9: Refers to the total variation from the lowest crossing point to the highest, regardless of which edge is crossing. Refers to all crossing

points for this measurement. See Parameter Measurement Information Section.

NOTE 10: Defined as the total variation of all crossing voltage of rising Qx and falling nQx. This is the maximum allowed variance in the

V_CROSSfor any particular system. See Parameter Measurement Information Section.

NOTE 11: Measurement taken from differential waveform.

NOTE 12: Measurement from -150mV to +150mV on the differential waveform (derived from Qx minus nQx). The signal must be monotonic

through the measurement region for rise and fall time. The 300mV measurement window is centered on the differential zero crossing.

NOTE 13: Assuming 50% input duty cycle. Data taken at ƒ 200MHz, unless otherwise specified.

December 3, 2015

1 2 345 6 7...16

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