Datasheet > 843003BGI-09LF

843003BGI-09LF

更新时间： 2024-02-15 06:35:50

品牌	Logo	应用领域
艾迪悌 - IDT		时钟光电二极管外围集成电路晶体
页数	文件大小	规格书
17页	696K
描述
Clock Generator, 170MHz, PDSO24, 4.40 X 7.80 MM, 0.925 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-24

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843003BGI-09LF 技术参数

ICS843003I-09

FEMTOCLOCKS™ CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER

3. Calculations and Equations.

The purpose of this section is to derive the power dissipated into the load.

LVPECL output driver circuit and termination are shown in Figure 7.

V_CCO

V_OUT

50Ω

V_CCO- 2V

Figure 7. LVPECL Driver Circuit and Termination

To calculate worst case power dissipation into the load, use the following equations which assume a 50Ω load, and a termination voltage

of V_CCO- 2V.

•

For logic high, V_OUT= V_{OH_MAX}= V_{CCO_MAX}– 0.9V

(V_{CCO_MAX}- V_{OH_MAX}) = 0.9V

For logic low, V_OUT= V_{OL_MAX}= V_{COO_MAX –}1.7V

(V_{CCO_MAX}- V_{OL_MAX}) = 1.7V

Pd_H is power dissipation when the output drives high.

Pd_L is the power dissipation when the output drives low.

Pd_H = [(V_{OH_MAX –}(V_{CCO_MAX}- 2V))/R_L] * (V_{CCO_MAX}- V_{OH_MAX}) = [(2V - (V_{CCO_MAX}- V_{OH_MAX}))/R_L] * (V_{CCO_MAX}- V_{OH_MAX}) =

[(2V - 0.9V)/50Ω] * 0.9V = 19.8mW

Pd_L = [(V_{OL_MAX}(V_{CCO_MAX}- 2V))/R_L] * (V_{CCO_MAX}- V_{OL_MAX}) = [(2V - (V_{CCO_MAX}- V_{OL_MAX}))/R_L] * (V_{CCO_MAX}- V_{OL_MAX}) =

–

[(2V - 1.7V)/50Ω] * 1.7V = 10.2mW

Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW

IDT™ / ICS™ 3.3V LVPECL FREQUENCY SYNTHESIZER

ICS843003BGI-09 REV. A APRIL 17, 2008

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型号	品牌	描述	获取价格	数据表
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