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84162012A

更新时间： 2024-02-08 11:05:34

品牌	Logo	应用领域
德州仪器 - TI		移位寄存器触发器逻辑集成电路
页数	文件大小	规格书
20页	593K
描述
8-BIT PARALLEL-OUT SERIAL SHIFT REGISTERS

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84162012A 数据手册

SN54HC164, SN74HC164

8-BIT PARALLEL-OUT SERIAL SHIFT REGISTERS

SCLS115D – DECEMBER 1982 – REVISED AUGUST 2003

PARAMETER MEASUREMENT INFORMATION

High-Level

Pulse

50%

From Output

Under Test

Test

Point

0 V

= 50 pF

Low-Level

Pulse

(see Note A)

50%

0 V

LOAD CIRCUIT

VOLTAGE WAVEFORMS

PULSE DURATIONS

Input

50%

0 V

PLH

PHL

90%

In-Phase

Output

Reference

Input

90%

50%

10%

50%

10%

0 V

PLH

PHL

90%

Data

Input

90%

Out-of-Phase

Output

50%

10%

50%

10%

50%

10%

50%

10%

0 V

VOLTAGE WAVEFORMS

SETUP AND HOLD AND INPUT RISE AND FALL TIMES

VOLTAGE WAVEFORMS

PROPAGATION DELAY AND OUTPUT TRANSITION TIMES

NOTES: A.

B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following

characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 6 ns, t = 6 ns.

C includes probe and test-fixture capacitance.

C. For clock inputs, f

is measured when the input duty cycle is 50%.

max

D. The outputs are measured one at a time with one input transition per measurement.

E. and t are the same as t

PLH

PHL

Figure 1. Load Circuit and Voltage Waveforms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

1...3 4 567 8 9...20

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