Datasheet > 83115I

83115I

更新时间： 2024-09-30 01:11:43

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
11页	161K
描述
Low Skew, 1-to-16 LVCMOS/LVTTL Fanout Buffer

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数据手册

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83115I 数据手册

Low Skew, 1-to-16 LVCMOS/LVTTL

Fanout Buffer

83115I

DATA SHEET

General Description

Features

The 83115I is a low skew, 1-to-16 LVCMOS/ LVTTL Fanout Buffer.

The 83115I single-ended clock input accepts LVCMOS or LVTTL

input levels. The 83115I operates at full 3.3V supply mode over

the industrial temperature range. Guaranteed output and

part-to-part skew characteristics make the 83115I ideal for those

clock distribution applications demanding well defined

performance and repeatability.

• Sixteen LVCMOS / LVTTL outputs, 15 output impedance

• One LVCMOS / LVTTL clock input

• Maximum output frequency: 200MHz

• All inputs are 5V tolerant

• Output skew: 250ps (maximum)

• Part-to-part skew: 800ps (maximum)

• Additive phase jitter, RMS: 0.20ps (typical)

• Full 3.3V operating supply

• -40°C to 85°C ambient operating temperature

• Available in lead-free (RoHS 6) package

Block Diagram

Pin Assignment

OE2

V^DD

OE1

OE2

27 Q15

26 Q14

Q13

VDD

GND

GND 10

Q5 11

Q12

Q11

GND

Q15

Q14

Q13

Q12

Q11

Q10

18 Q10

OE0

83115I

28-Lead SSOP, 150mil

9.9mm x 3.9mm x 1.5mm package body

R Package

OE1

GND

OE0

Top View

83115I Rev B 4/28/15

12 3 4 5 6 7...11

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8312AYILF	IDT	获取价格	Low Skew, 1-to-12 LVCMOS/LVTTL Fanout Buffer
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