Datasheet > 82077AA

82077AA

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
英特尔 - INTEL		控制器
页数	文件大小	规格书
62页	473K
描述
CHMOS SINGLE-CHIP FLOPPY DISK CONTROLLER

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82077AA 数据手册

82077AA

Table 1. 82077AA Pin Description (Continued)

Symbol

HOST INTERFACE (Continued)

IDENT 27 IDENTITY: Upon Hardware RESET, this input (along with MFM pin) selects

I/O

Description

between the three interface modes. After RESET, this input selects the type of

drive being accessed and alters the level on DENSEL. The MFM pin is also

sampled at Hardware RESET, and then becomes an output again. Internal pull-

ups on MFM permit a no connect.

IDENT

MFM

1 or NC AT Mode

ILLEGAL

1 or NC PS/2 Mode

Model 30 Mode

INTERFACE

AT MODE: Major options are: enables DMA Gate logic, TC is active high,

Status Registers A & B not available.

PS/2 MODE: Major options are: No DMA Gate logic, TC is active low, Status

Registers A & B are available.

MODEL 30 MODE: Major options are: enable DMA Gate logic, TC is active

high, Status Registers A & B available.

After Hardware reset this pin determines the polarity of the DENSEL pin. IDENT

at a logic level of ‘‘1’’, DENSEL will be active high for high (500 Kbps/1 Mbps)

data rates (typically used for 5.25 drives). IDENT at a logic level of ‘‘0’’,

DENSEL will be active low for high data rates (typically used for 3.5 drives).

INVERT is tied to ground.

DISK CONTROL (All outputs have 40 mA drive capability)

INVERT

INVERT: Strapping option. Determines the polartity of all signals in this section.

Should be strapped to ground when using the internal buffers and these signals

become active LOW. When strapped to VCC, these signals become active high

and external inverting drivers and receivers are required.

ME0

ME1

ME2

ME3

ME0–3: Decoded Motor enables for drives 0–3. The motor enable pins are

directly controlled via the Digital Output Register.

DS0

DS1

DS2

DS3

DRIVE SELECT 0–3: Decoded drive selects for drives 0–3. These outputs are

decoded from the select bits in the Digital Output Register and gated by

ME0–3.

HDSEL

HEAD SELECT: Selects which side of a disk is to be used. An active level

selects side 1.

STEP

DIR

STEP: Supplies step pulses to the drive.

DIRECTION: Controls the direction the head moves when a step signal is

present. The head moves toward the center if active.

WRDATA

WRITE DATA: FM or MFM serial data to the drive. Precompensation value is

selectable through software.

WRITE ENABLE: Drive control signal that enables the head to write onto the

disk.

1 2 3 456 7 8...62

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