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80C51BHP

更新时间: 2024-01-21 01:44:52
品牌 Logo 应用领域
英特尔 - INTEL 微控制器
页数 文件大小 规格书
21页 285K
描述
CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER

80C51BHP 技术参数

生命周期:Active包装说明:,
Reach Compliance Code:unknownHTS代码:8542.31.00.01
风险等级:5.57技术:CMOS
uPs/uCs/外围集成电路类型:MICROCONTROLLERBase Number Matches:1

80C51BHP 数据手册

 浏览型号80C51BHP的Datasheet PDF文件第1页浏览型号80C51BHP的Datasheet PDF文件第2页浏览型号80C51BHP的Datasheet PDF文件第3页浏览型号80C51BHP的Datasheet PDF文件第5页浏览型号80C51BHP的Datasheet PDF文件第6页浏览型号80C51BHP的Datasheet PDF文件第7页 
87C51/80C51BH/80C31BH  
PIN DESCRIPTION  
Port 2 also receives some control signals and the  
high-order address bits during EPROM programming  
and program verification.  
V : Supply voltage during normal, Idle and Power  
CC  
Down operations.  
Port 3: Port 3 is an 8-bit bidirectional I/O port with  
internal pullups. The Port 3 output buffers can drive  
LS TTL inputs. Port 3 pins that have 1’s written to  
them are pulled high by the internal pullups, and in  
that state can be used as inputs. As inputs, Port 3  
pins that are externally pulled low will source current  
V
: Circuit ground.  
SS  
Port 0: Port 0 is an 8-bit open drain bidirectional I/O  
port. As an output port each pin can sink several LS  
TTL inputs. Port 0 pins that have 1’s written to them  
float, and in that state can be used as high-imped-  
ance inputs.  
(I , on the data sheet) because of the pullups.  
IL  
Port 3 also serves the functions of various special  
features of the MCS-51 Family, as listed below:  
Port 0 is also the multiplexed low-order address and  
data bus during accesses to external memory. In this  
application it uses strong internal pullups when emit-  
ting 1’s.  
Pin Name  
Alternate Function  
P3.0 RXD Serial input line  
P3.1 TXD Serial output line  
P3.2 INT0 External Interrupt 0  
P3.3 INT1 External Interrupt 1  
Port 0 also receives the code bytes during EPROM  
programming, and outputs the code bytes during  
program verification. External pullups are required  
during program verification.  
P3.4  
P3.5  
P3.6  
P3.7  
T0  
T1  
Timer 0 external input  
Timer 1 external input  
Port 1: Port 1 is an 8-bit bidirectional I/O port with  
internal pullups. The Port 1 output buffers can drive  
LS TTL inputs. Port 1 pins that have 1’s written to  
them are pulled high by the internal pullups, and in  
that state can be used as inputs. As inputs, Port 1  
pins that are externally pulled low will source current  
WR  
RD  
External Data Memory Write strobe  
External Data Memory Read strobe  
Port 3 also receives some control signals for  
EPROM programming and program verification.  
(I , on the data sheet) because of the internal pull-  
IL  
ups.  
RST: Reset input. A high on this pin for two machine  
cycles while the oscillator is running resets the de-  
vice. The port pins will be driven to their reset condi-  
Port 1 also receives the low-order address bytes  
during EPROM programming and program verifica-  
tion.  
tion when a minimum V  
voltage is applied wheth-  
IH1  
er the oscillator is running or not. An internal pull-  
down resistor permits a power-on reset with only a  
Port 2: Port 2 is an 8-bit bidirectional I/O port with  
internal pullups. Port 2 pins that have 1’s written to  
them are pulled high by the internal pullups, and in  
that state can be used as inputs. As inputs, Port 2  
pins that are externally pulled low will source current  
capacitor connected to V  
.
CC  
ALE/PROG: Address Latch Enable output signal for  
latching the low byte of the address during accesses  
to external memory. This pin is also the program  
pulse input (PROG) during EPROM programming for  
the 87C51.  
(I , on the data sheet) because of the internal pull-  
IL  
ups.  
Port 2 emits the high-order address byte during  
fetches from external Program memory and during  
accesses to external Data Memory that use 16-bit  
If desired, ALE operation can be disabled by setting  
bit 0 of SFR location 8EH. With this bit set, the pin is  
weakly pulled high. However, the ALE disable fea-  
ture will be suspended during a MOVX or MOVC in-  
struction, idle mode, power down mode and ICE  
mode. The ALE disable feature will be terminated by  
reset. When the ALE disable feature is suspended or  
terminated, the ALE pin will no longer be pulled up  
weakly. Setting the ALE-disable bit has no effect if  
the microcontroller is in external execution mode.  
@
address (MOVX DPTR). In this application it uses  
strong internal pullups when emitting 1’s.  
During accesses to external Data Memory that use  
@
8-bit addresses (MOVX Ri), Port 2 emits the con-  
tents of the P2 Special Function Register.  
4

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