78P2343JAT

更新时间： 2024-02-24 04:38:59

品牌	Logo	应用领域
TERIDIAN		/
页数	文件大小	规格书
37页	351K
描述
3-port E3/DS3/STS-1 LIU with Jitter Attenuator

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技术参数
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78P2343JAT 技术参数

生命周期：	Transferred	零件包装代码：	QFP
包装说明：	LFQFP,	针数：	100
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.12	JESD-30 代码：	S-PQFP-G100
长度：	14 mm	功能数量：	1
端子数量：	100	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	LFQFP	封装形状：	SQUARE
封装形式：	FLATPACK, LOW PROFILE, FINE PITCH	认证状态：	Not Qualified
座面最大高度：	1.6 mm	标称供电电压：	3.3 V
表面贴装：	YES	电信集成电路类型：	PCM TRANSCEIVER
温度等级：	INDUSTRIAL	端子形式：	GULL WING
端子节距：	0.5 mm	端子位置：	QUAD
宽度：	14 mm	Base Number Matches：	1

78P2343JAT 数据手册

78P2343JAT

3-port E3/DS3/STS-1 LIU

with Jitter Attenuator

On the transmit side, when the ENDEC is enabled,

NRZ input data is encoded to Positive and Negative

AMI logic data following the B3ZS (for DS3/STS-1)

or HDB3 (for E3) substitution codes. The NRZ data

is input to the TPOS pin as shown below:

B3ZS/HDB3 ENDEC WITH LINE CODE VIOLATION

DETECT

The 78P2343JAT includes a selectable B3ZS/HDB3

Encoder/Decoder (ENDEC). The ENDEC function

can be enabled or disabled through pin selection or

ENDECB

TPOSx

TNEGx

bit/pin

0 / L

ENDECB

RPOSx

RNEGx

bit/pin

NRZ data

‘Don’t Care’

1 / H

Positive AMI

Negative AMI

Receive Line Code

Violation Indicator

0 / L

NRZ data

TRANSMITTER OPERATION

1 / H

Positive AMI

Negative AMI

Transmitters 1-3 are enabled by their corresponding

TXEN bit. When enabled, each transmitter accepts

logic level clock and data signals and generates

current pulses on the LOUTPx and LOUTNx pins.

When properly connected to a 1:2CT center-tapped

transformer, a standards compliant AMI pulse is

When the ENDEC is enabled, the decoder

generates a composite NRZ logic data stream

following the B3ZS (for DS3/STS-1) or HDB3 (for E3)

substitution codes via the RPOSx pins:

generated which can drive a 75

Ω coaxial cable.

The decoder also detects Receive Line Code

Violations (RLCV) and outputs a pulse via the

RNEG pin. Three different classes of line code

violations are detected.

When the recommended transformer is used and

when DS3 mode is selected, the transmitted pulse

shape at the end of the 75

Ω terminated cable of 0 to

450 feet will fit the DS3 template in ANSI T1.102-

1993 and Telcordia GR-499-CORE. For STS-1

applications, the transmitted pulse for a short cable

meets the requirements of Telcordia GR-253-CORE.

For E3 applications, the transmitted pulse for a short

cable meets the requirements of ITU-T G.703.

1) Too many zeros:

More than two (three)

consecutive zeros in B3ZS (HDB3) mode.

2) Not enough zeros between bipolar pulse (B)

and bipolar violation pulse (V): (B,V) for B3ZS.

(B,V) or (B,0,V) for HDB3.

3) Code violation: Even number of bipolar pulses

(B) detected between bipolar violation pulses

(V).

In either DS3 and STS-1 modes, the LBOx pin or

LBO bit should be set high for short cable (< 225 ft),

and should be set low for long cable (> 225 ft). The

LBO settings are ignored in E3 mode.

When the ENDEC is disabled, the 78P2343JAT

outputs a dual rail data stream via the RPOSx and

RNEGx pins. In this mode, the Framer/Mapper

providing the ENDEC function typically detects Line

Code Violations.

RCLK/TCLK POLARITY REVERSAL

To simplify the interface with various framer circuitry,

TCLK polarity can be internally inverted by setting

the TCLKP bit, and RCLK polarity can be inverted

by setting the RCLKP bit. Both bits are located in

the Master Control Register (MSCR).

REMOTE (DIGITAL) LOOPBACK

When the Register Control bit, REGEN, is disabled

and the LPBKx pin is floating; or when the Register

Control bit, REGEN, is enabled and the RLBK bit is

set, RCLKx, RNEGx, and RPOSx outputs are

internally looped back to the TCLKx, TNEGx, and

TPOSx inputs respectively.

Page 4 of 37



2005 Teridian Semiconductor Corporation

Rev 2.2

1 2 345 6 7...37

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与78P2343JAT相关器件

型号	品牌	描述	获取价格	数据表
78P2343JAT-IEL	TERIDIAN	3-port E3/DS3/STS-1 LIU with Jitter Attenuator	获取价格
78P2343JAT-IEL	TDK	PCM Transceiver, 1-Func, PQFP100, LQFP-100	获取价格
78P2343JAT-IEL/A07	TERIDIAN	3-port E3/DS3/STS-1 LIU with Jitter Attenuator	获取价格
78P2343JAT-IEL/A07	TDK	Telecom IC, PQFP100	获取价格
78P2343JAT-IEL/A07R	TERIDIAN	Telecom IC, PQFP100,	获取价格
78P2343JAT-IEL/A07R/F	TERIDIAN	Telecom IC, PQFP100,	获取价格

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