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78P2343-IEL/A07R/F PDF预览

78P2343-IEL/A07R/F

更新时间: 2024-01-02 21:20:24
品牌 Logo 应用领域
东电化 - TDK /
页数 文件大小 规格书
37页 459K
描述
Digital Transmission Interface, E-3, PQFP100

78P2343-IEL/A07R/F 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:QFP, QFP100,.63SQ,20Reach Compliance Code:compliant
风险等级:5.22运营商类型:E-3
运营商类型(2):STS-1/OC-1运营商类型(3):T-3(DS3)
JESD-30 代码:S-PQFP-G100端子数量:100
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装等效代码:QFP100,.63SQ,20封装形状:SQUARE
封装形式:FLATPACK电源:3.3 V
认证状态:Not Qualified子类别:Other Telecom ICs
最大压摆率:355 mA标称供电电压:3.3 V
表面贴装:YES温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUADBase Number Matches:1

78P2343-IEL/A07R/F 数据手册

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78P2343JAT  
3-port E3/DS3/STS-1 LIU  
with Jitter Attenuator  
LOCAL LOOPBACK AND REDUNDANCY MUX  
Transmitter  
#1  
Receivers 1 and 2 have a 4-input MUX as shown in  
the adjacent figure. In multiport applications where  
redundant channels are required, the receiver MUX  
can be configured to provide the necessary  
multiplexing functions. This allows the user to use  
one port as a redundant monitor for the other port.  
The tables below show the register settings for  
selecting the desired receiver input source.  
LOUTP1, LOUTN1  
LINP1, LINN1  
00  
Receiver  
01  
10  
11  
#1  
LLBKA,B(1)  
Transmitter  
#2  
LOUTP2, LOUTN2  
LINP2, LINN2  
LLBKA  
LLBKB  
Receiver #1 Input  
Source  
(Port 1)  
(Port 1)  
00  
01  
10  
11  
Receiver  
0
0
1
1
0
1
0
1
LINP1/LINN1  
#2  
LOUTP1/LOUTN1  
LINP2/LINN2  
LLBKA,B(2)  
LOUTP2/LOUTN2  
Transmitter  
#3  
LOUTP3, LOUTN3  
LINP3, LINN3  
LLBKA  
LLBKB  
Receiver #2 Input  
Source  
0
(Port 2)  
(Port 2)  
Receiver  
1
#3  
0
0
1
1
0
1
0
1
LINP2/LINN2  
LOUTP2/LOUTN2  
LINP1/LINN1  
LLBKB(3)  
LOUTP1/LOUTN1  
When serial interface control is not available, the  
respective LPBKx pin for each of the channels can  
also be used to activate local loopback mode as  
shown below. Note that redundant channel modes  
can only be activated using the serial interface.  
LLBKB  
Receiver #3 Input  
Source  
(Port 3)  
0
1
LINP3/LINN3  
LOUTP3/LOUTN3  
LPBKx  
Loopback Mode  
pin  
Note: The LLBKA and LLBKB bits are located in the  
Normal Operation  
Mode Control Register (MDCR).  
The Register  
L
Same as LLBKA,B = ‘00’  
Control bit, REGEN, should be enabled when using  
the register settings to avoid conflict with external  
loopback setting pins.  
Remote (Digital) Loopback  
Z
Same as RLBK = ‘1’  
Local (Analog) Loopback  
H
Same as LLBKA,B = ‘01’  
- 3 -  

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