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74VHC273MTR PDF预览

74VHC273MTR

更新时间: 2024-11-27 04:48:03
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器
页数 文件大小 规格书
14页 333K
描述
OCTAL D-TYPE FLIP FLOP WITH CLEAR

74VHC273MTR 数据手册

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74VHC273  
OCTAL D-TYPE FLIP FLOP WITH CLEAR  
HIGH SPEED:  
= 165 MHz (TYP.) at V = 5V  
f
MAX  
CC  
LOW POWER DISSIPATION:  
= 4 µA (MAX.) at T =25°C  
I
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28% V (MIN.)  
V
NIH  
NIL  
CC  
SOP  
TSSOP  
POWER DOWN PROTECTION ON INPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 8 mA (MIN)  
BALANCED PROPAGATION DELAYS:  
OH  
OL  
Table 1: Order Codes  
PACKAGE  
t
t
PLH  
PHL  
T & R  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 5.5V  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 273  
SOP  
74VHC273MTR  
74VHC273TTR  
V
CC  
TSSOP  
IMPROVED LATCH-UP IMMUNITY  
When the CLEAR input is held low, the Q outputs  
are held low independently of the other inputs.  
Power down protection is provided on all inputs  
and 0 to 7V can be accepted on inputs with no  
regard to the supply voltage. This device can be  
used to interface 5V to 3V.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
LOW NOISE: V  
= 0.9V (MAX.)  
OLP  
DESCRIPTION  
The 74VHC273 is an advanced high-speed  
CMOS OCTAL D-TYPE FLIP FLOP WITH CLEAR  
fabricated with sub-micron silicon gate and  
2
double-layer metal wiring C MOS technology.  
Information signals applied to D inputs are  
transferred to the Q outputs on the positive going  
edge of the clock pulse.  
Figure 1: Pin Connection And IEC Logic Symbols  
Rev. 5  
1/14  
November 2004  

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