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74LVCH32373AEC

更新时间： 2024-01-18 12:46:59

品牌	Logo	应用领域
恩智浦 - NXP		锁存器逻辑集成电路驱动
页数	文件大小	规格书
16页	83K
描述
32-bit transparent D-type latch with 5 V tolerant inputs/outputs; 3-state

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74LVCH32373AEC 技术参数

生命周期：	Obsolete	零件包装代码：	BGA
包装说明：	LFBGA,	针数：	96
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.45	系列：	LVC/LCX/Z
JESD-30 代码：	R-PBGA-B96	长度：	13.5 mm
逻辑集成电路类型：	BUS DRIVER	位数：	8
功能数量：	4	端口数量：	2
端子数量：	96	最高工作温度：	85 °C
最低工作温度：	-40 °C	输出特性：	3-STATE
输出极性：	TRUE	封装主体材料：	PLASTIC/EPOXY
封装代码：	LFBGA	封装形状：	RECTANGULAR
封装形式：	GRID ARRAY, LOW PROFILE, FINE PITCH	传播延迟（tpd）：	5.8 ns
认证状态：	Not Qualified	座面最大高度：	1.5 mm
最大供电电压 (Vsup)：	3.6 V	最小供电电压 (Vsup)：	1.2 V
标称供电电压 (Vsup)：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子形式：	BALL	端子节距：	0.8 mm
端子位置：	BOTTOM	宽度：	5.5 mm
Base Number Matches：	1

74LVCH32373AEC 数据手册

Philips Semiconductors

Product speciﬁcation

32-bit transparent D-type latch with

5 V tolerant inputs/outputs; 3-state

74LVCH32373A

FEATURES

The 74LVCH32373A is a 32-bit transparent D-type latch

featuring separate D-type inputs for each latch and 3-state

outputs for bus oriented applications. One latch enable

(nLE) input and one output enable (nOE) are provided for

each octal. Inputs can be driven from either 3.3 or 5 V

devices.

• 5 V tolerant inputs/outputs for interfacing with 5 V logic

• Wide supply voltage range from 1.2 to 3.6 V

• CMOS low power consumption

• MULTIBYTE flow-trough standard pin-out architecture

The 74LVCH32373A consists of 4 sections of eight D-type

transparent latches with 3-state true outputs. When input

nLE is HIGH, data at the nD_ninputs enter the latches. In

this condition the latches are transparent, i.e. a latch

output will change each time its corresponding D-input

changes.

• Low inductance multiple power and ground pins for

minimum noise and ground bounce

• Direct interface with TTL levels

• Bus hold on data inputs

• Typical output ground bounce voltage:

V_OLP< 0.8 V at V_CC= 3.3 V and T_amb= 25 °C

When input nLE is LOW the latches store the information

that was present at the D-inputs one set-up time preceding

the HIGH-to-LOW transition of nLE. When input nOE is

LOW, the contents of the eight latches are available at the

outputs. When input nOE is HIGH, the outputs go to the

high-impedance OFF-state. Operation of the nOE input

does not affect the state of the latches.

• Typical output undershoot voltage:

V_OHV> 2 V at V_CC= 3.3 V and T_amb= 25 °C

• Power off disables outputs, permitting live insertion

• Packaged in plastic fine-pitch ball grid array package.

DESCRIPTION

The 74LVCH32373A bus hold data input circuits eliminate

the need for external pull-up resistors to hold unused

inputs.

The 74LVCH32373A is a high-performance, low-power,

low-voltage, Si-gate CMOS device, superior to most

advanced CMOS compatible TTL families.

The inputs can be driven from either 3.3 or 5 V devices.

In 3-state operation, outputs can handle 5 V. These

features allow the use of these devices in a mixed

3.3 or 5 V environment.

QUICK REFERENCE DATA

GND = 0 V; T_amb= 25 °C; t_r= t_f≤ 2.5 ns.

SYMBOL

_PHL/t_PLH

PARAMETER

propagation delay

CONDITIONS

TYPICAL

UNIT

nD_nto nQ_n

nLE to nQ_n

C_L= 50 pF; V_CC= 3.3 V

3.0

3.4

5.0

C_I

input capacitance

C_PD

power dissipation capacitance

per buffer

V_I= GND to V_CC; note 1

Note

1. C_PDis used to determine the dynamic power dissipation (P_Din µW).

P_D= C_PD× V_CC²× f_i+ Σ (C_L× V_CC²× f_o) where:

f_i= input frequency in MHz;

f_o= output frequency in MHz;

C_L= output load capacitance in pF;

V_CC= supply voltage in Volts;

Σ (C_L× V_CC²× f_o) = sum of the outputs.

1999 Nov 24

123 4 5 6 7...16

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与74LVCH32373AEC相关器件

型号	品牌	描述	获取价格	数据表
74LVCH32373AEC,518	NXP	74LVCH32373A - 32-bit transparent D-type latch with 5 V tolerant inputs/outputs; 3-state B	获取价格
74LVCH32373AEC,551	NXP	74LVCH32373A - 32-bit transparent D-type latch with 5 V tolerant inputs/outputs; 3-state B	获取价格
74LVCH32373AEC/G,5	NXP	74LVCH32373A - 32-bit transparent D-type latch with 5 V tolerant inputs/outputs; 3-state B	获取价格
74LVCH32373AEC/G;5	NXP	74LVCH32373A - 32-bit transparent D-type latch with 5 V tolerant inputs/outputs; 3-state B	获取价格
74LVCH32373AEC-S	NXP	IC LVC/LCX/Z SERIES, QUAD 8-BIT DRIVER, TRUE OUTPUT, PBGA96, PLASTIC, FBGA-96, Bus Driver/	获取价格
74LVCH32374A	NXP	32-bit edge-triggered D-type flip-flop with 5 V tolerant inputs/outputs; 3-state	获取价格

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