Datasheet > 74HCT9046APW,112

74HCT9046APW,112

更新时间： 2024-01-25 11:22:19

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
43页	209K
描述
74HCT9046A - PLL with band gap controlled VCO TSSOP 16-Pin

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

74HCT9046APW,112 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
零件包装代码：	TSSOP	包装说明：	4.40 MM, PLASTIC, MO-153, SOT-403-1, TSSOP-16
针数：	16	Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01	风险等级：	5.65
模拟集成电路 - 其他类型：	PHASE LOCKED LOOP	JESD-30 代码：	R-PDSO-G16
JESD-609代码：	e4	长度：	5 mm
湿度敏感等级：	1	功能数量：	1
端子数量：	16	最高工作温度：	125 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP	封装等效代码：	TSSOP16,.25
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：	260	电源：	5 V
认证状态：	Not Qualified	座面最大高度：	1.1 mm
子类别：	PLL or Frequency Synthesis Circuits	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	4.5 V	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	AUTOMOTIVE	端子面层：	NICKEL PALLADIUM GOLD
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	30
宽度：	4.4 mm	Base Number Matches：	1

74HCT9046APW,112 数据手册

74HCT9046A

NXP Semiconductors

PLL with band gap controlled VCO

8. Functional description

The 74HCT9046A is a phase-locked-loop circuit that comprises a linear VCO and two

different phase comparators (PC1 and PC2) with a common signal input ampliﬁer and a

common comparator input, see Figure 1. The signal input can be directly coupled to large

voltage signals (CMOS level), or indirectly coupled (with a series capacitor) to small

voltage signals. A self-bias input circuit keeps small voltage signals within the linear region

of the input ampliﬁers. With a passive low-pass ﬁlter, the 74HCT9046A forms a

second-order loop PLL.

The principle of this phase-locked-loop is based on the familiar 74HCT4046A. However

extra features are built-in, allowing very high-performance phase-locked-loop applications.

This is done, at the expense of PC3, which is skipped in this 74HCT9046A. The PC2 is

equipped with a current source output stage here. Further a band gap is applied for all

internal references, allowing a small center frequency tolerance. The details are summed

up in Section 8.1. If one is familiar with the 74HCT4046A already, it will do to read this

section only.

8.1 Differences with respect to the familiar 74HCT4046A

• A center frequency tolerance of maximum ±10 %.

• The on board band gap sets the internal references resulting in a minimal frequency

shift at supply voltage variations and temperature variations.

• The value of the frequency offset is determined by an internal reference voltage of

2.5 V instead of V_CC− 0.7 V; In this way the offset frequency will not shift over the

supply voltage range.

• A current switch charge pump output on pin PC2_OUT allows a virtually ideal

performance of PC2; The gain of PC2 is independent of the voltage across the

low-pass ﬁlter; Further a passive low-pass ﬁlter in the loop achieves an active

performance. The inﬂuence of the parasitic capacitance of the PC2 output plays no

role here, resulting in a true correspondence of the output correction pulse and the

phase difference even up to phase differences as small as a few nanoseconds.

• Because of its linear performance without dead zone, higher impedance values for the

ﬁlter, hence lower C-values, can be chosen; correct operation will not be inﬂuenced by

parasitic capacitances as in case of the voltage source output using the

74HCT4046A.

• No PC3 on pin RB but instead a resistor connected to GND, which sets the

load/unload currents of the charge pump (PC2).

• Extra GND pin 1 to allow an excellent FM demodulator performance even at 10 MHz

and higher.

• Combined function of pin PC1_OUT/PCP_OUT. If pin RB is connected to V_CC(no

bias resistor R_bias) pin PC1_OUT/PCP_OUT has its familiar function viz. output of

PC1. If at pin RB a resistor (R_bias) is connected to GND it is assumed that PC2 has

been chosen as phase comparator. Connection of R_biasis sensed by internal circuitry

and this changes the function of pin PC1_OUT/PCP_OUT into a lock detect output

(PCP_OUT) with the same characteristics as PCP_OUT of pin 1 of the 74HCT4046A.

74HCT9046A_6

Product data sheet

Rev. 06 — 15 September 2009

6 of 43

1...3 4 567 8 9...43

下载PDF

与74HCT9046APW,112相关器件

型号	品牌	描述	获取价格	数据表
74HCT9046APW-T	NXP	暂无描述	获取价格
74HCT9114	NXP	Nine wide Schmitt trigger buffer; open drain outputs; inverting	获取价格
74HCT9114D	NXP	IC HCT SERIES, 9 1-INPUT INVERT GATE, PDSO20, SO-20, Gate	获取价格
74HCT9114D	NEXPERIA	Nine wide Schmitt trigger buffer; open drain outputs; invertingProduction	获取价格
74HCT9114D,112	NXP	74HC(T)9114 - Nine wide Schmitt trigger buffer; open drain outputs; inverting SOP 20-Pin	获取价格
74HCT9114DB	NXP	IC HCT SERIES, 9 1-INPUT INVERT GATE, PDSO20, Gate	获取价格

与74HCT9046APW,112相关文章

MC34063开关稳压器：全面参数解析与设计指南
2024-05-08

2
CC2530无线微控制器：资料手册参数分析
2024-05-08

7
NE5532双低噪声运算放大器：资料手册参数分析
2024-05-07

13
74LS138 3-to-8线解码器/多路复用器：资料手册参数分析
2024-05-07

17

产品中心

服务支持

精选活动

关于我们

帮助中心

74HCT9046APW,112

74HCT9046APW,112 技术参数

74HCT9046APW,112 数据手册

与74HCT9046APW,112相关器件

与74HCT9046APW,112相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

74HCT9046APW,112

74HCT9046APW,112 技术参数

74HCT9046APW,112 数据手册

与74HCT9046APW,112相关器件

与74HCT9046APW,112相关文章

您还可以找

您在本页遇到什么问题？