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74HCT9046APW,112 PDF预览

74HCT9046APW,112

更新时间: 2024-02-06 15:02:01
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
43页 209K
描述
74HCT9046A - PLL with band gap controlled VCO TSSOP 16-Pin

74HCT9046APW,112 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:4.40 MM, PLASTIC, MO-153, SOT-403-1, TSSOP-16
针数:16Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.65
模拟集成电路 - 其他类型:PHASE LOCKED LOOPJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:5 mm
湿度敏感等级:1功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:5 V
认证状态:Not Qualified座面最大高度:1.1 mm
子类别:PLL or Frequency Synthesis Circuits最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:NICKEL PALLADIUM GOLD
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:4.4 mmBase Number Matches:1

74HCT9046APW,112 数据手册

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74HCT9046A  
PLL with band gap controlled VCO  
Rev. 06 — 15 September 2009  
Product data sheet  
1. General description  
The 74HCT9046A is a high-speed Si-gate CMOS device. It is specified in compliance with  
JEDEC standard no 7A.  
2. Features  
I Operation power supply voltage range from 4.5 V to 5.5 V  
I Low power consumption  
I Inhibit control for ON/OFF keying and for low standby power consumption  
I center frequency up to 17 MHz (typical) at VCC = 5.5 V  
I Choice of two phase comparators:  
N PC1: EXCLUSIVE-OR  
N PC2: Edge-triggered JK flip-flop  
I No dead zone of PC2  
I Charge pump output on PC2, whose current is set by an external resistor Rbias  
I center frequency tolerance ±10 %  
I Excellent Voltage Controlled Oscillator (VCO) linearity  
I Low frequency drift with supply voltage and temperature variations  
I On-chip band gap reference  
I Glitch free operation of VCO, even at very low frequencies  
I Zero voltage offset due to operational amplifier buffering  
I ESD protection:  
N HBM JESD22-A114F exceeds 2000 V  
N MM JESD22-A115-A exceeds 200 V  
 
 

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