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74HCT4053PW118 PDF预览

74HCT4053PW118

更新时间: 2022-04-11 19:15:20
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恩智浦 - NXP 解复用器
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32页 226K
描述
Triple 2-channel analog multiplexer/demultiplexer

74HCT4053PW118 数据手册

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74HC4053; 74HCT4053  
NXP Semiconductors  
Triple 2-channel analog multiplexer/demultiplexer  
6.2 Pin description  
Table 2.  
Symbol  
E
Pin description  
Pin  
Description  
6
enable input (active LOW)  
supply voltage  
VEE  
7
GND  
8
ground supply voltage  
select input  
S1, S2, S3  
1Y0, 2Y0, 3Y0  
1Y1, 2Y1, 3Y1  
1Z, 2Z, 3Z  
VCC  
11, 10, 9  
12, 2, 5  
13, 1, 3  
14, 15, 4  
16  
independent input or output  
independent input or output  
common output or input  
supply voltage  
7. Functional description  
Table 3.  
Function table [1]  
Inputs  
Channel on  
E
L
Sn  
L
nY0 to nZ  
nY1 to nZ  
switches off  
L
H
H
X
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care.  
8. Limiting values  
Table 4.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).  
Symbol  
VCC  
IIK  
Parameter  
Conditions  
Min  
Max  
+11.0  
20  
20  
25  
20  
50  
Unit  
V
[1]  
supply voltage  
0.5  
input clamping current  
VI < 0.5 V or VI > VCC + 0.5 V  
-
mA  
mA  
mA  
mA  
mA  
mA  
C  
ISK  
switch clamping current VSW < 0.5 V or VSW > VCC + 0.5 V  
-
ISW  
switch current  
0.5 V < VSW < VCC + 0.5 V  
-
IEE  
supply current  
-
ICC  
supply current  
-
IGND  
Tstg  
Ptot  
ground current  
-
50  
+150  
750  
500  
storage temperature  
total power dissipation  
65  
[2]  
[3]  
DIP16 package  
-
-
mW  
mW  
SO16, (T)SSOP16, and  
DHVQFN16 package  
P
power dissipation  
per switch  
-
100  
mW  
[1] To avoid drawing VCC current out of terminal nZ, when switch current flows into terminals nYn, the voltage drop across the bidirectional  
switch must not exceed 0.4 V. If the switch current flows into terminal nZ, no VCC current will flow out of terminals nYn, and in this case  
there is no limit for the voltage drop across the switch, but the voltages at nYn and nZ may not exceed VCC or VEE  
.
[2] For DIP16 packages: above 70 C the value of Ptot derates linearly with 12 mW/K.  
74HC_HCT4053  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 8 — 19 July 2012  
5 of 32  

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