Datasheet > 74HC670N,652

74HC670N,652

更新时间： 2024-02-29 03:20:51

品牌	Logo	应用领域
恩智浦 - NXP		静态存储器光电二极管
页数	文件大小	规格书
9页	77K
描述
4X4 STANDARD SRAM, 59ns, PDIP16

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74HC670N,652 数据手册

Philips Semiconductors

Product speciﬁcation

4 x 4 register ﬁle; 3-state

74HC/HCT670

PIN DESCRIPTION

PIN NO.

SYMBOL

NAME AND FUNCTION

5, 4

R_A, R_B

GND

read address inputs

ground (0 V)

10, 9, 7, 6

Q₀to Q₃

data outputs

3-state output read enable input (active LOW)

write enable input (active LOW)

write address inputs

data inputs

14, 13

15, 1, 2, 3

W_A, W_B

D₀to D₃

V_CC

positive supply voltage

Fig.1 Pin configuration.

Fig.2 Logic symbol.

Fig.3 IEC logic symbol.

Fig.4 Functional diagram.

WRITE MODE SELECT TABLE

INPUTS

READ MODE SELECT TABLE

OPERATING

INPUTS

OUTPUT

Q_n

OPERATING

MODE

INTERNAL

LATCHES⁽¹⁾

MODE

WE D_n

INTERNAL LATCHES⁽¹⁾

write data

read

data latched

no change

disabled

Note

Notes

1. The write address (W_Aand W_B) to the

“internal latches” must be stable while WE is

LOW for conventional operation.

1. The selection of the “internal latches” by read address

(R_Aand R_B) are not constrained by WE or RE operation.

H = HIGH voltage level

L = LOW voltage level

X = don’t care

Z = high impedance OFF-state

December 1990

1 234 5 6 7...9

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