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74HC58N,652 PDF预览

74HC58N,652

更新时间: 2024-02-26 02:49:08
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
5页 35K
描述
74HC58 - Dual AND-OR gate DIP 14-Pin

74HC58N,652 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP14,.3
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:8.59
其他特性:ASYMMETRICAL I/P'S系列:HC/UH
JESD-30 代码:R-PDIP-T14JESD-609代码:e4
长度:19.025 mm负载电容(CL):50 pF
逻辑集成电路类型:AND-OR GATE最大I(ol):0.004 A
功能数量:2输入次数:6
端子数量:14最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP14,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):260电源:2/6 V
Prop。Delay @ Nom-Sup:29 ns传播延迟(tpd):35 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:4.2 mm子类别:Gates
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:7.62 mm
Base Number Matches:1

74HC58N,652 数据手册

 浏览型号74HC58N,652的Datasheet PDF文件第1页浏览型号74HC58N,652的Datasheet PDF文件第2页浏览型号74HC58N,652的Datasheet PDF文件第3页浏览型号74HC58N,652的Datasheet PDF文件第4页 
Philips Semiconductors  
Product specification  
Dual AND-OR gate  
74HC58  
DC CHARACTERISTICS FOR 74HC  
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.  
Output capability: standard  
ICC category: SSI  
AC CHARACTERISTICS FOR 74HC  
GND = 0 V; tr = tf = 6 ns; CL = 50 pF  
T
amb (°C)  
TEST CONDITIONS  
74HC  
SYMBOL  
PARAMETER  
UNIT  
VCC  
+25  
40 to +85 40 to +125  
WAVEFORMS  
(V)  
min. typ. max. min. max. min. max.  
tPHL/ tPLH  
propagation delay  
1A,1B,1C,1D,1E,  
1F to 1Y  
36  
13  
10  
115  
23  
20  
145  
29  
25  
175  
35  
30  
ns  
2.0  
4.5  
6.0  
Fig.6  
Fig.6  
Fig.6  
t
t
PHL/ tPLH  
propagation delay  
2A,2B,2C,2D to 2Y  
30  
11  
9
100  
20  
17  
125  
25  
21  
150  
30  
26  
ns  
ns  
2.0  
4.5  
6.0  
THL/ tTLH  
output transition  
time  
19  
7
6
75  
15  
13  
95  
19  
16  
110  
22  
19  
2.0  
4.5  
6.0  
AC WAVEFORMS  
(1)  
nA, nB, nC, nD,  
1E, 1F INPUT  
V
M
t
t
PHL  
PLH  
(1)  
V
M
nY OUTPUT  
t
t
MBA336  
(1) HC : VM = 50%; VI = GND to VCC  
.
THL  
TLH  
Fig.6 Waveforms showing the input (nA, nB, nC, nD, 1E, 1F) to output (nY) propagation delays and the output  
transition times.  
PACKAGE OUTLINES  
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.  
December 1990  
5

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