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74HC590BQ PDF预览

74HC590BQ

更新时间: 2024-01-15 10:57:33
品牌 Logo 应用领域
安世 - NEXPERIA 输出元件逻辑集成电路触发器
页数 文件大小 规格书
18页 291K
描述
8-bit binary counter with output register; 3-stateProduction

74HC590BQ 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:VQCCN,Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.68
其他特性:TCO OUTPUT;REGISTERED OUTPUTS计数方向:UP
系列:HC/UHJESD-30 代码:R-PQCC-N16
JESD-609代码:e4长度:3.5 mm
负载/预设输入:YES逻辑集成电路类型:BINARY COUNTER
工作模式:ASYNCHRONOUS湿度敏感等级:1
位数:8功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-40 °C输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:VQCCN
封装形状:RECTANGULAR封装形式:CHIP CARRIER, VERY THIN PROFILE
峰值回流温度(摄氏度):260传播延迟(tpd):230 ns
座面最大高度:1 mm最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
触发器类型:POSITIVE EDGE宽度:2.5 mm
最小 fmax:26 MHz

74HC590BQ 数据手册

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74HC590  
8-bit binary counter with output register; 3-state  
Rev. 4 — 14 March 2022  
Product data sheet  
1. General description  
The 74HC590 is an 8-bit binary counter with a storage register and 3-state outputs. The storage  
register has parallel (Q0 to Q7) outputs. The binary counter features master reset counter (MRC)  
and count enable (CE) inputs. The counter and storage register have separate positive edge  
triggered clock (CPC and CPR) inputs. If both clocks are connected together, the counter state is  
always one count ahead of the register. Internal circuitry prevents clocking from the clock enable.  
A ripple carry output (RCO) is provided for cascading. Cascading is accomplished by connecting  
RCO of the first stage to CE of the second stage. Cascading for larger count chains can be  
accomplished by connecting RCO of each stage to the counter clock (CPC) input of the following  
stage. Inputs include clamp diodes. This enables the use of current limiting resistors to interface  
inputs to voltages in excess of VCC  
.
2. Features and benefits  
Wide supply voltage range from 2.0 V to 6.0 V  
CMOS low power dissipation  
High noise immunity  
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B  
Complies with JEDEC standards:  
JESD8C (2.7 V to 3.6 V)  
JESD7A (2.0 V to 6.0 V)  
CMOS input levels  
Counter and register have independent clock inputs  
Counter has master reset  
Multiple package options  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
CDM JESD22-C101C exceeds 1000 V  
Specified from -40 °C to +85 °C and from -40 °C to +125 °C  
3. Ordering information  
Table 1. Ordering information  
Type number Package  
Temperature range Name  
Description  
Version  
74HC590D  
-40 °C to +125 °C  
SO16  
plastic small outline package; 16 leads; body width 3.9 mm SOT109-1  
74HC590PW -40 °C to +125 °C  
TSSOP16  
plastic thin shrink small outline package; 16 leads;  
body width 4.4 mm  
SOT403-1  
SOT763-1  
74HC590BQ -40 °C to +125 °C  
DHVQFN16 plastic dual in-line compatible thermal enhanced  
very thin quad flat package; no leads; 16 terminals;  
body 2.5 × 3.5 × 0.85 mm  
 
 
 

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