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74FCT244P PDF预览

74FCT244P

更新时间: 2024-09-25 00:52:35
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
7页 81K
描述
FAST CMOS OCTAL D FLIP-FLOP WITH MASTER RESET

74FCT244P 数据手册

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FAST CMOS  
IDT54/74FCT273T/AT/CT  
OCTAL D FLIP-FLOP  
WITH MASTER RESET  
DESCRIPTION:  
FEATURES:  
The FCT273T is an octal D flip-flop built using an advanced dual metal  
CMOS technology. The FCT273T has eight edge-triggered D-type flip-  
flops with individual D inputs and O outputs. The common buffered Clock  
(CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops  
simultaneously.  
• Std., A, and C grades  
• Low input and output leakage 1µA (max.)  
• CMOS power levels  
• True TTL input and output compatibility:  
– VOH = 3.3V (typ.)  
The register is fully edge-triggered. The state of each D input, one set-  
up time before the low-to-high clock transition, is transferred to the corre-  
spondingflip-flop’sOoutput.  
All outputs will be forced low independently of Clock or Data inputs by  
a low voltage level on the MR input. The device is useful for applications  
where the true output only is required and the Clock and Master Reset are  
commontoallstorageelements.  
– VOL = 0.3V (typ.)  
• High Drive outputs (-15mA IOH, 48mA IOL)  
• Meets or exceeds JEDEC standard 18 specifications  
• Military product compliant to MIL-STD-883, Class B and DESC  
listed (dual marked)  
• Power off disable outputs permit "live insertion"  
• Available in the following packages:  
– Industrial: SOIC, SSOP, QSOP  
– Military: CERDIP, LCC  
FUNCTIONALBLOCKDIAGRAM  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
CP  
Q
Q
Q
Q
Q
Q
Q
Q
D
D
D
D
D
D
D
D
CP  
RD  
CP  
RD  
CP  
RD  
CP  
RD  
CP  
RD  
CP  
RD  
CP  
RD  
CP  
RD  
MR  
O0  
O1  
O2  
O3  
O4  
O5  
O6  
O7  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
MILITARY AND INDUSTRIAL TEMPERATURE RANGES  
JUNE 2002  
1
© 2002 Integrated Device Technology, Inc.  
DSC-2568/2  

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