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74F538SC PDF预览

74F538SC

更新时间: 2024-01-14 06:31:20
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 解码器逻辑集成电路光电二极管输入元件驱动
页数 文件大小 规格书
7页 65K
描述
1-of-8 Decoder with 3-STATE Outputs

74F538SC 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:DIP,针数:20
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.69
其他特性:4 ENABLE INPUTS系列:F/FAST
JESD-30 代码:R-PDIP-T20功能数量:1
端子数量:20最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
输出极性:CONFIGURABLE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE传播延迟(tpd):12 ns
认证状态:Not Qualified最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:COMMERCIAL端子形式:THROUGH-HOLE
端子位置:DUALBase Number Matches:1

74F538SC 数据手册

 浏览型号74F538SC的Datasheet PDF文件第2页浏览型号74F538SC的Datasheet PDF文件第3页浏览型号74F538SC的Datasheet PDF文件第4页浏览型号74F538SC的Datasheet PDF文件第5页浏览型号74F538SC的Datasheet PDF文件第6页浏览型号74F538SC的Datasheet PDF文件第7页 
April 1988  
Revised August 1999  
74F538  
1-of-8 Decoder with 3-STATE Outputs  
General Description  
The 74F538 decoder/demultiplexer accepts three Address  
Features  
Output polarity control  
(A0–A2) input signals and decodes them to select one of  
Data demultiplexing capability  
Multiple enables for expansion  
3-STATE outputs  
eight mutually exclusive outputs. A polarity control input (P)  
determines whether the outputs are active LOW or active  
HIGH. A HIGH Signal on either of the active LOW Output  
Enable (OE) inputs forces all outputs to the high imped-  
ance state. Two active HIGH and two active LOW input  
enables are available for easy expansion to 1-of 32 decod-  
ing with four packages, or for data demultiplexing to 1-of-8  
or 1-of-16 destinations.  
Ordering Code:  
Order Number Package Number  
Package Description  
74F538SC  
74F538SJ  
74F538PC  
M20B  
M20D  
N20A  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
© 1999 Fairchild Semiconductor Corporation  
DS009551  
www.fairchildsemi.com  

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