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74F164 PDF预览

74F164

更新时间: 2024-02-29 01:38:43
品牌 Logo 应用领域
恩智浦 - NXP 移位寄存器
页数 文件大小 规格书
10页 86K
描述
8-bit serial-in parallel-out shift register

74F164 技术参数

生命周期:Obsolete零件包装代码:QFN
包装说明:QCCJ,针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.61Is Samacsys:N
计数方向:RIGHT系列:F/FAST
JESD-30 代码:S-PQCC-J20长度:8.9662 mm
逻辑集成电路类型:SERIAL IN PARALLEL OUT位数:8
功能数量:1端子数量:20
最高工作温度:70 °C最低工作温度:
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装形状:SQUARE
封装形式:CHIP CARRIER传播延迟(tpd):11 ns
认证状态:Not Qualified座面最大高度:4.57 mm
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD触发器类型:POSITIVE EDGE
宽度:8.9662 mm最小 fmax:90 MHz
Base Number Matches:1

74F164 数据手册

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Philips Semiconductors  
Product specification  
8-bit serial-in parallel-out shift register  
74F164  
FEATURES  
PIN CONFIGURATION  
Gated serial data inputs  
Dsa  
Dsb  
Q0  
1
2
3
4
5
14 V  
CC  
Typical shift frequency of 100MHz  
Asynchronous Master Reset  
Buffered clock and data inputs  
Fully synchronous data transfer  
Industrial temperature range available (–40°C to +85°C)  
13 Q7  
12 Q6  
11 Q5  
10 Q4  
Q1  
Q2  
Q3  
6
7
9
8
MR  
CP  
GND  
DESCRIPTION  
The 74F164 is an 8-bit edge-triggered shift register with serial data  
entry and an output from each of the eight stages. Data is entered  
through one of two inputs (Dsa, Dsb); either input can be used as an  
active High enable for data entry through the other input. Both inputs  
must be connected together or an unused input must be tied High.  
SF00717  
TYPICAL SUPPLY  
CURRENT (TOTAL)  
TYPE  
TYPICAL f  
max  
Data shifts one place to the right on each Low-to-High transition of  
the clock (CP) input, and enters into Q0 the logical AND of the two  
data inputs (Dsa, Dsb) that existed one setup time before the rising  
edge. A Low level on the Master Reset (MR) input overrides all  
other inputs and clears the register asynchronously, forcing all  
outputs Low.  
74F164  
100MHz  
33mA  
ORDERING INFORMATION  
ORDER CODE  
DRAWING  
NUMBER  
DESCRIPTION  
COMMERCIAL RANGE  
INDUSTRIAL RANGE  
V
CC  
= 5V ±10%, T  
= 0°C to +70°C  
V
= 5V ±10%, T  
= –40°C to +85°C  
amb  
CC  
amb  
14-pin plastic DIP  
14-pin plastic SO  
74F164N  
74F164D  
I74F164N  
SOT27-1  
I74F164D  
SOT108-1  
INPUT AND OUTPUT LOADING AND FAN OUT TABLE  
74F (U.L.)  
HIGH/LOW  
LOAD VALUE  
HIGH/LOW  
PINS  
DESCRIPTION  
Dsa, Dsb  
Data inputs  
1.0/1.0  
20µA/0.6mA  
CP  
MR  
Clock pulse input (active rising edge)  
Master reset input (active-Low)  
Data outputs  
1.0/1.0  
1.0/1.0  
50/33  
20µA/0.6mA  
20µA/0.6mA  
1.0mA/20mA  
Q0 – Q7  
One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.  
LOGIC SYMBOL  
IEC/IEEE SYMBOL  
SRG8  
C1/  
8
9
R
1
2
1
2
&
3
4
5
1D  
Dsa  
Dsb  
8
9
CP  
MR  
Q0 Q1 Q3 Q4 Q0 Q1 Q3 Q4  
6
10  
11  
12  
3
4
5
6 10 11 12 13  
13  
V
= Pin 14  
CC  
GND = Pin 7  
SF00714  
SF00713  
2
1995 Sep 22  
853-0348 15794  

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