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74F164 PDF预览

74F164

更新时间: 2024-02-11 09:22:57
品牌 Logo 应用领域
恩智浦 - NXP 移位寄存器
页数 文件大小 规格书
10页 86K
描述
8-bit serial-in parallel-out shift register

74F164 技术参数

生命周期:Obsolete零件包装代码:QFN
包装说明:QCCJ,针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.61Is Samacsys:N
计数方向:RIGHT系列:F/FAST
JESD-30 代码:S-PQCC-J20长度:8.9662 mm
逻辑集成电路类型:SERIAL IN PARALLEL OUT位数:8
功能数量:1端子数量:20
最高工作温度:70 °C最低工作温度:
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装形状:SQUARE
封装形式:CHIP CARRIER传播延迟(tpd):11 ns
认证状态:Not Qualified座面最大高度:4.57 mm
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD触发器类型:POSITIVE EDGE
宽度:8.9662 mm最小 fmax:90 MHz
Base Number Matches:1

74F164 数据手册

 浏览型号74F164的Datasheet PDF文件第2页浏览型号74F164的Datasheet PDF文件第3页浏览型号74F164的Datasheet PDF文件第4页浏览型号74F164的Datasheet PDF文件第6页浏览型号74F164的Datasheet PDF文件第7页浏览型号74F164的Datasheet PDF文件第8页 
Philips Semiconductors  
Product specification  
8-bit serial-in parallel-out shift register  
74F164  
AC ELECTRICAL CHARACTERISTICS  
LIMITS  
T
= +25°C  
T
= 0°C to +70°C  
= +5V±10%  
T
= –40°C to +85°C  
amb  
V
amb  
amb  
V
= 5V  
V
CC  
= +5V±10%  
TEST  
CONDITION  
CC  
CC  
SYMBOL  
PARAMETER  
UNIT  
C = 50pF  
R = 500Ω  
L
C = 50pF  
R = 500Ω  
L
C = 50pF  
L
R = 500Ω  
L
L
L
MIN  
TYP MAX  
MIN  
MAX  
MIN  
MAX  
f
Maximum clock frequency  
Waveform 1  
Waveform 1  
80  
100  
80  
80  
MHz  
ns  
max  
t
t
Propagation delay  
CP to Qn  
3.0  
5.0  
5.0  
7.0  
8.0  
10.0  
2.5  
5.0  
9.0  
11.0  
2.5  
5.0  
9.0  
11.0  
PLH  
PHL  
Propagation delay  
MR to Qn  
t
Waveform 3  
5.5  
7.5  
10.5  
5.5  
11.5  
5.5  
11.5  
ns  
PHL  
AC SETUP REQUIREMENTS  
LIMITS  
T
= +25°C  
T
= 0°C to +70°C  
= +5V±10%  
T = –40°C to +85°C  
amb  
amb  
V
amb  
= 5V  
V
CC  
V
CC  
= +5V±10%  
TEST  
CONDITION  
CC  
SYMBOL  
PARAMETER  
UNIT  
C = 50pF  
R = 500Ω  
L
C = 50pF  
R = 500Ω  
L
C = 50pF  
R = 500Ω  
L
L
L
L
MIN  
TYP MAX  
MIN  
MAX  
MIN  
MAX  
t (H)  
t (L)  
S
Setup time, High or Low  
D to CP  
n
7.0  
7.0  
7.0  
7.0  
7.0  
7.0  
s
Waveform 2  
Waveform 2  
Waveform 1  
Waveform 3  
Waveform 3  
ns  
ns  
ns  
ns  
ns  
t (H)  
Hold time, High or Low  
D to CP  
n
1.0  
1.0  
2.0  
2.0  
2.0  
2.0  
h
t (L)  
h
t (H)  
CP Pulse width  
High or Low  
4.0  
7.0  
4.0  
7.0  
4.0  
7.0  
w
t (L)  
w
MR Pulse wicth  
Low  
t (L)  
w
7.0  
7.0  
7.0  
7.0  
7.0  
7.0  
Recovery time  
MR to CP  
t
REC  
AC WAVEFORMS  
For all waveforms, V = 1.5V.  
M
The shaded areas indicate when the input is permitted to change for predictable output performance.  
1/f  
max  
MR  
CP  
V
V
M
M
CP  
Qn  
V
V
V
M
M
M
t
(H)  
w
t
w
(L)  
t
REC  
t
t
w
(L)  
t
PLH  
PHL  
V
M
V
V
M
M
t
PHL  
SF00294  
Qn  
V
M
Waveform 1. Propagation delay for Clock input to output,  
Clock Pulse width, and maximum Clock frequency  
SF00158  
Waveform 3. Master Reset pulse width, Master Reset to output  
delay and Master Reset to Clock recovery time  
Dn  
CP  
V
V
t
V
V
M
M
M
M
t (H)  
(H)  
t (L)  
t
(L)  
s
h
s
h
V
V
M
M
SF00191  
Waveform 2. Data setup and hold times  
5
1995 Sep 22  

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