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74AUP1G885DC-G PDF预览

74AUP1G885DC-G

更新时间: 2024-01-18 05:45:45
品牌 Logo 应用领域
恩智浦 - NXP 输入元件光电二极管逻辑集成电路石英晶振触发器
页数 文件大小 规格书
19页 88K
描述
IC AUP/ULP/V SERIES, DUAL 3-INPUT XOR GATE, PDSO8, 2.30 MM, GREEN, PLASTIC, MO-187, SOT-765-1, VSSOP-8, Gate

74AUP1G885DC-G 技术参数

Source Url Status Check Date:2013-06-14 00:00:00是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:2.30 MM, GREEN, PLASTIC, MO-187, SOT-765-1, VSSOP-8针数:8
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.45系列:AUP/ULP/V
JESD-30 代码:R-PDSO-G8JESD-609代码:e4
长度:2.3 mm负载电容(CL):30 pF
逻辑集成电路类型:XOR GATE最大I(ol):0.0017 A
湿度敏感等级:1功能数量:2
输入次数:3端子数量:8
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:VSSOP
封装等效代码:TSSOP8,.12,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:1.2/3.3 V
Prop。Delay @ Nom-Sup:23.7 ns传播延迟(tpd):23.7 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:1 mm子类别:Gates
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):0.8 V
标称供电电压 (Vsup):1.2 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:NICKEL PALLADIUM GOLD端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:2 mm
Base Number Matches:1

74AUP1G885DC-G 数据手册

 浏览型号74AUP1G885DC-G的Datasheet PDF文件第2页浏览型号74AUP1G885DC-G的Datasheet PDF文件第3页浏览型号74AUP1G885DC-G的Datasheet PDF文件第4页浏览型号74AUP1G885DC-G的Datasheet PDF文件第6页浏览型号74AUP1G885DC-G的Datasheet PDF文件第7页浏览型号74AUP1G885DC-G的Datasheet PDF文件第8页 
74AUP1G885  
NXP Semiconductors  
Low-power dual function gate  
9. Recommended operating conditions  
Table 6.  
Symbol  
VCC  
Operating conditions  
Parameter  
Conditions  
Min  
0.8  
0
Max  
3.6  
Unit  
V
supply voltage  
input voltage  
VI  
3.6  
V
VO  
output voltage  
Active mode  
0
VCC  
3.6  
V
Power-down mode; VCC = 0 V  
0
V
Tamb  
ambient temperature  
40  
-
+125  
200  
°C  
ns/V  
t/V  
input transition rise and fall VCC = 0.8 V to 3.6 V  
rate  
10. Static characteristics  
Table 7.  
Static characteristics  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Tamb = 25 °C  
VIH  
HIGH-level input voltage  
VCC = 0.8 V  
0.70 × VCC  
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
VCC = 0.9 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
VCC = 0.8 V  
0.65 × VCC  
1.6  
2.0  
VIL  
LOW-level input voltage  
-
-
-
-
0.30 × VCC  
0.35 × VCC  
0.7  
VCC = 0.9 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
0.9  
VOH  
HIGH-level output voltage VI = VIH or VIL  
IO = 20 µA; VCC = 0.8 V to 3.6 V  
V
CC 0.1  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
IO = 1.1 mA; VCC = 1.1 V  
IO = 1.7 mA; VCC = 1.4 V  
IO = 1.9 mA; VCC = 1.65 V  
IO = 2.3 mA; VCC = 2.3 V  
IO = 3.1 mA; VCC = 2.3 V  
IO = 2.7 mA; VCC = 3.0 V  
IO = 4.0 mA; VCC = 3.0 V  
0.75 × VCC  
1.11  
1.32  
2.05  
1.9  
2.72  
2.6  
74AUP1G885_5  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 05 — 26 June 2009  
5 of 19  
 
 

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