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74ACT533SCXR PDF预览

74ACT533SCXR

更新时间: 2024-10-02 13:04:55
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 锁存器
页数 文件大小 规格书
7页 92K
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74ACT533SCXR 数据手册

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August 1999  
Revised March 2005  
74ACT533  
Octal Transparent Latch with 3-STATE Outputs  
General Description  
Features  
The ACT533 consists of eight latches with 3-STATE out-  
puts for bus organized system applications. The flip-flops  
appear transparent to the data when Latch Enable (LE) is  
HIGH. When LE is low, the data satisfying the input timing  
requirements is latched. Data appears on the bus when the  
Output Enable (OE) is LOW. When OE is HIGH, the bus  
output is in the high impedance state.  
ICC and IOZ reduced by 50%  
Eight latches in a single package  
3-STATE outputs drive bus lines or buffer memory  
address registers  
Outputs source/sink 24 mA  
Inverted version of the ACT373  
TTL-compatible inputs  
Ordering Code:  
Order Number Package Number  
Package Description  
74ACT533SC  
74ACT533MTC  
74ACT533PC  
M20B  
MTC20  
N20A  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
Description  
D0D7  
LE  
Data Inputs  
Latch Enable Input  
OE  
Output Enable Input  
3-STATE Latch Outputs  
O0O7  
FACT is a trademark of Fairchild Semiconductor Corporation.  
© 2005 Fairchild Semiconductor Corporation  
DS500311  
www.fairchildsemi.com  

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