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74ABT534APWDH-T PDF预览

74ABT534APWDH-T

更新时间: 2024-02-04 16:10:12
品牌 Logo 应用领域
恩智浦 - NXP 触发器
页数 文件大小 规格书
12页 115K
描述
IC ABT SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO20, Bus Driver/Transceiver

74ABT534APWDH-T 技术参数

生命周期:ObsoleteReach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.33
Is Samacsys:N其他特性:POWER OFF DISABLE OUTPUTS TO PERMIT LIVE INSERTION
系列:ABTJESD-30 代码:R-PDSO-G20
长度:12.8 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE最大电源电流(ICC):30 mA
传播延迟(tpd):7.6 ns认证状态:Not Qualified
座面最大高度:2.65 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:BICMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
宽度:7.5 mmBase Number Matches:1

74ABT534APWDH-T 数据手册

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Philips Semiconductors  
Product specification  
Octal D-type flip-flop, inverting (3-State)  
74ABT534A  
FEATURES  
8-bit positive edge triggered register  
DESCRIPTION  
The 74ABT534A high-performance BiCMOS device combines low  
static and dynamic power dissipation with high speed and high  
output drive.  
3-State output buffers  
Output capability: +64mA/–32mA  
The 74ABT534A is an 8-bit, edge triggered register coupled to eight  
3-State output buffers. The two sections of the device are controlled  
independently by the clock (CP) and Output Enable (OE) control  
gates.  
Latch-up protection exceeds 500mA per Jedec JC40.2 Std 17  
ESD protection exceeds 2000 V per MIL STD 883 Method 3015  
and 200 V per Machine Model  
The register is fully edge triggered. The state of each D input, one  
set-up time before the Low-to-High clock transition, is transferred to  
the corresponding flip-flop’s output.  
Power-up 3-State  
The 3-State output buffers are designed to drive heavily loaded  
3-State buses, MOS memories, or MOS microprocessors. The  
active-Low Output Enable (OE) controls all eight 3-State buffers  
independent of the clock operation.  
When OE is Low, the stored data appears at the outputs. When OE  
is High, the outputs are in the High-impedance “OFF” state, which  
means they will neither drive nor load the bus.  
QUICK REFERENCE DATA  
CONDITIONS  
= 25°C; GND = 0V  
SYMBOL  
PARAMETER  
TYPICAL  
UNIT  
T
amb  
t
t
Propagation delay  
CP to Qn  
3.3  
3.6  
PLH  
PHL  
C = 50pF; V = 5V  
ns  
L
CC  
C
Input capacitance  
Output capacitance  
Total supply current  
V = 0V or V  
CC  
3.5  
6.5  
pF  
pF  
µA  
IN  
I
C
Outputs disabled; V = 0V or V  
O CC  
OUT  
CCZ  
I
Outputs disabled; V =5.5V  
100  
CC  
ORDERING INFORMATION  
PACKAGES  
TEMPERATURE RANGE OUTSIDE NORTH AMERICA  
NORTH AMERICA  
74ABT534A N  
DWG NUMBER  
SOT146-1  
20-Pin Plastic DIP  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
74ABT534A N  
74ABT534A D  
74ABT534A DB  
74ABT534A PW  
20-Pin plastic SO  
74ABT534A D  
SOT163-1  
20-Pin Plastic SSOP Type II  
20-Pin Plastic TSSOP Type I  
74ABT534A DB  
74ABT534APW DH  
SOT339-1  
SOT360-1  
PIN CONFIGURATION  
PIN DESCRIPTION  
PIN NUMBER SYMBOL  
FUNCTION  
1
OE  
Output enable input (active-Low)  
Data inputs  
OE  
Q0  
D0  
D1  
Q1  
Q2  
D2  
D3  
Q3  
1
2
3
4
5
20  
19  
18  
17  
16  
V
CC  
3, 4, 7, 8,  
13, 14, 17, 18  
Q7  
D0-D7  
D7  
D6  
Q6  
Q5  
D5  
D4  
Q4  
2, 5, 6, 9,  
12, 15, 16, 19  
Q0-Q7  
Inverting 3-State outputs  
Clock pulse input  
(active rising edge)  
11  
CP  
6
7
8
9
15  
14  
13  
12  
10  
20  
GND  
Ground (0V)  
V
CC  
Positive supply voltage  
GND 10  
11 CP  
SA00161  
2
1997 Feb 03  
853-1910 17722  

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