Datasheet > 74ABT162823ADGGRG4

74ABT162823ADGGRG4

更新时间： 2022-10-12 16:33:20

品牌	Logo	应用领域
德州仪器 - TI		输出元件
页数	文件大小	规格书
10页	180K
描述
18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

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74ABT162823ADGGRG4 数据手册

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ꢘꢏ ꢆ ꢙ ꢋ ꢎꢀꢆꢄꢆ ꢑ ꢗꢐꢆ ꢖꢐ ꢆꢀ

SCBS666B − JULY 1996 − REVISED JUNE 2004

PARAMETER MEASUREMENT INFORMATION

7 V

TEST

Open

500 Ω

From Output

Under Test

PLH PHL

Open

7 V

GND

PLZ PZL

= 50 pF

Open

PHZ PZH

500 Ω

(see Note A)

3 V

0 V

LOAD CIRCUIT

Timing Input

Data Input

1.5 V

3 V

0 V

3 V

0 V

Input

1.5 V

VOLTAGE WAVEFORMS

PULSE DURATION

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

3 V

0 V

3 V

0 V

Output

Control

1.5 V

Input

PZL

PHL

PLH

PHL

PLZ

Output

Waveform 1

S1 at 7 V

3.5 V

1.5 V

Output

+ 0.3 V

(see Note B)

PHZ

PLH

PZH

Output

Waveform 2

S1 at Open

(see Note B)

− 0.3 V

1.5 V

Output

≈0 V

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

INVERTING AND NONINVERTING OUTPUTS

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

LOW- AND HIGH-LEVEL ENABLING

NOTES: A. includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.

C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.

D. The outputs are measured one at a time, with one transition per measurement.

E. All parameters and waveforms are not applicable to all devices.

Figure 1. Load Circuit and Voltage Waveforms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

1...3 4 567 8 9 10

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