5秒后页面跳转
74LS241 PDF预览

74LS241

更新时间: 2024-02-23 07:38:24
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 75K
描述
Octal 3-STATE Buffer/Line Driver/Line Receiver

74LS241 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete包装说明:SOP, SOP20,.4
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.45控制类型:ENABLE LOW/HIGH
JESD-30 代码:R-PDSO-G20JESD-609代码:e0
逻辑集成电路类型:BUS DRIVER位数:4
功能数量:2端子数量:20
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
子类别:Bus Driver/Transceivers标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
Base Number Matches:1

74LS241 数据手册

 浏览型号74LS241的Datasheet PDF文件第2页浏览型号74LS241的Datasheet PDF文件第3页浏览型号74LS241的Datasheet PDF文件第4页浏览型号74LS241的Datasheet PDF文件第5页浏览型号74LS241的Datasheet PDF文件第6页浏览型号74LS241的Datasheet PDF文件第7页 
August 1986  
Revised March 2000  
DM74LS240 • DM74LS241  
Octal 3-STATE Buffer/Line Driver/Line Receiver  
General Description  
Features  
These buffers/line drivers are designed to improve both the  
performance and PC board density of 3-STATE buffers/  
drivers employed as memory-address drivers, clock driv-  
ers, and bus-oriented transmitters/receivers. Featuring  
400 mV of hysteresis at each low current PNP data line  
input, they provide improved noise rejection and high  
fanout outputs and can be used to drive terminated lines  
down to 133.  
3-STATE outputs drive bus lines directly  
PNP inputs reduce DC loading on bus lines  
Hysteresis at data inputs improves noise margins  
Typical IOL (sink current)  
24 mA  
Typical IOH (source current)  
15 mA  
Typical propagation delay times  
Inverting  
10.5 ns  
12 ns  
Noninverting  
Typical enable/disable time 18 ns  
Typical power dissipation (enabled)  
Inverting  
130 mW  
135 mW  
Noninverting  
Ordering Code:  
Order Number Package Number  
Package Description  
DM74LS240WM  
DM74LS240SJ  
DM74LS240N  
DM74LS241WM  
DM74LS241N  
M20B  
M20D  
N20A  
M20B  
N20A  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagrams  
DM74LS240  
DM74LS241  
© 2000 Fairchild Semiconductor Corporation  
DS006411  
www.fairchildsemi.com  

与74LS241相关器件

型号 品牌 描述 获取价格 数据表
74LS241DC ETC Dual 4-Bit Non-Inverting Buffer/Driver

获取价格

74LS241DCQM FAIRCHILD Bus Driver, 2-Func, 4-Bit, True Output, TTL, CDIP20,

获取价格

74LS241DCQM ROCHESTER Bus Driver,

获取价格

74LS241DCQR ROCHESTER Bus Driver,

获取价格

74LS241FC FAIRCHILD Bus Driver, 2-Func, 4-Bit, True Output, TTL, CDFP20,

获取价格

74LS241PC ETC Dual 4-Bit Non-Inverting Buffer/Driver

获取价格