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73S8009R-IMR/F PDF预览

73S8009R-IMR/F

更新时间： 2024-01-20 09:44:21
品牌 Logo 应用领域
TERIDIAN 模拟IC信号电路PC
页数 文件大小 规格书
23页 337K
描述
Low Cost Versatile Smart Card Interface

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中文翻译

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73S8009R-IMR/F 技术参数

是否无铅：含铅是否Rohs认证：不符合
生命周期：Obsolete零件包装代码：QFN
包装说明：4 X 4 MM, 0.80 MM HEIGHT, LEAD FREE, QFN-20针数：20
Reach Compliance Code：not_compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.64
Samacsys Confidence：Samacsys Status：Released
Samacsys PartID：599351Samacsys Pin Count：21
Samacsys Part Category：Integrated CircuitSamacsys Package Category：Other
Samacsys Footprint Name：QFN50P400X400X90-21NSamacsys Released Date：2017-01-11 21:24:41
Is Samacsys：N其他特性：ALSO OPERATES WITH 5 VOLT SUPPLY
模拟集成电路 - 其他类型：ANALOG CIRCUITJESD-30 代码：S-XQCC-N20
长度：4 mm功能数量：1
端子数量：20最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：UNSPECIFIED
封装代码：HVQCCN封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度（摄氏度）：NOT SPECIFIED
认证状态：Not Qualified座面最大高度：0.9 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：2.7 V
表面贴装：YES温度等级：INDUSTRIAL
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：4 mmBase Number Matches：1

73S8009R-IMR/F 数据手册

 浏览型号73S8009R-IMR/F的Datasheet PDF文件第3页浏览型号73S8009R-IMR/F的Datasheet PDF文件第4页浏览型号73S8009R-IMR/F的Datasheet PDF文件第5页浏览型号73S8009R-IMR/F的Datasheet PDF文件第7页浏览型号73S8009R-IMR/F的Datasheet PDF文件第8页浏览型号73S8009R-IMR/F的Datasheet PDF文件第9页 
73S8009R Data Sheet  
DS_8009R_056  
Table 1 describes the pin functions for the device.  
Table 1: 73S8009R Pin Definitions  
Pin  
Name  
Pin  
Pin  
Type  
Description  
(SO28) (QFN20)  
Card Interface  
I/O  
25  
24  
23  
15  
NA  
NA  
IO  
IO  
IO  
Card I/O: Data signal to/from card. Includes a pull-up  
resistor to VCC.  
AUX1  
AUX2  
AUX1: Auxiliary data signal to/from card. Includes a pull-up  
resistor to VCC.  
AUX2: Auxiliary data signal to/from card. Includes a pull-up  
resistor to VCC.  
RST  
CLK  
21  
19  
13  
11  
O
O
Card reset: provides reset signal to card.  
Card clock: provides clock signal to card. The rate of this  
clock is determined by the external clock frequency  
provided on pin CLKIN.  
PRES  
PRES  
VCC  
26  
16  
22  
20  
16  
10  
14  
NA  
I
I
Card Presence switch: active high indicates card is present.  
Should be tied to GND when not used, but includes a high-  
impedance pull-down current source.  
Card Presence switch: active low indicates card is present.  
Should be tied to VDD when not used, but includes a high-  
impedance pull-up current source.  
PSO Card power supply – logically controlled by the sequencer,  
output of LDO regulator. Requires an external filter  
capacitor to GND.  
GND  
GND Card ground.  
Miscellaneous Inputs and Outputs  
CLKIN  
TEST1  
TEST2  
NC  
11  
2
5
19  
8
I
Clock source for the card clock.  
–
–
–
This pin must be tied to GND in typical applications.  
This pin must be tied to GND in typical applications.  
Non-connected pin.  
14  
3,17,18  
NA  
Power Supply and Ground  
VDD  
28  
17  
System interface supply voltage and supply voltage for  
internal circuitry.  
VPC  
GND  
15  
27  
9
LDO regulator power supply source.  
12  
GND Ground.  
Microcontroller Interface  
CS  
1
18  
20  
I
When CS = 1, the control and signal pins are configured  
normally. When CS is set low, CMDVCC%, RSTIN, and  
CMDVCC# are latched, IOUC, AUX1UC, and AUX2UC are  
set to high-impedance pull-up mode and do not pass data  
to or from the smart card. Signals RDY and OFF are  
disabled to prevent a low output and the internal pull-up  
resistors are disconnected.  
OFF  
4
O
Interrupt signal to the processor. Active low, multi-function  
indicating fault conditions and card presence. Open drain  
output configuration. It includes an internal 20 kΩ pull-up to  
VDD. The pull-up is disabled in PWRDN and CS=0 modes.  
6
Rev. 1.3  
 
1...3456789...23

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