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73M2901CL-IGV PDF预览

73M2901CL-IGV

更新时间: 2024-02-25 15:24:30
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TERIDIAN 调制解调器
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22页 266K
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73M2901CL-IGV 数据手册

 浏览型号73M2901CL-IGV的Datasheet PDF文件第1页浏览型号73M2901CL-IGV的Datasheet PDF文件第2页浏览型号73M2901CL-IGV的Datasheet PDF文件第3页浏览型号73M2901CL-IGV的Datasheet PDF文件第5页浏览型号73M2901CL-IGV的Datasheet PDF文件第6页浏览型号73M2901CL-IGV的Datasheet PDF文件第7页 
73M2901CE Data Sheet  
DS_2901CE_031  
1 Hardware Description  
The 73M2901CE is designed to operate from a +3.6 to +2.7 volt supply with low power consumption  
(~30 mW @ 3.0 volts). The modem supports automatic standby idle mode. The modem will also accept  
a request to power down from the DTE via hardware control. No additional major components are  
required to complete the modem core logic. The modem provides direct firmware LED support via the  
port pins (pins 3, 4, 5, 6, 31, and 32).  
The 73M2901 CE includes the following hardware features:  
Fully self-contained. “AT” Command interpreter and data pump.  
User pins available.  
Synchronous serial data I/O available.  
Asynchronous serial port.  
On-chip hybrid and line driver.  
Autobaud capability from 300 bps to 9600 bps.  
Reduced external hardware support required with energy incoming ring detection.  
1.1 Power Supply  
Power is supplied to the 73M2901CE by the VPD and VPA pins. The 73M2901CE is designed for a  
single +3.6 to +2.7 volt supply and for low power consumption (~30mW @ 3.0 volts). Ground is supplied  
to the 73M2901CE by the VND and VNA pins.  
The 73M2901CE has been designed with separated analog and digital supplies to insure the best  
performance of the part by using separately filtered power supplies. It is recommended that separate  
locally bypassed traces be used to apply power to the analog supply VPA and the digital supply VPD.  
1.2 Low Power Mode  
The Teridian 73M2901CE supports a low power standby mode. If the low power standby option is  
enabled, the 73M2901CE will go into a power saving mode when idle.  
While in this mode, the oscillator will be running and clocks will be supplied to the UART, timers and  
interrupt blocks, but no clocks will be supplied to the CPU. Instruction processing and activity on the  
internal busses is halted. Normal operation is resumed when an interruption such as assertion of DTR or  
RING occurs, a character is sent to the 73M2901CE TXD input, or a reset occurs.  
1.3 Analog Line / Hybrid Interface  
The 73M2901CE provides a differential analog output (TXAP and TXAN) and a single-ended analog input  
(RXA) with internal A/D and D/A converters. A driver is provided for an internal hybrid function.  
The internal hybrid driver is capable of driving an external load matching impedance and a line-coupling  
transformer. The internal hybrid/line driver senses the load and adapts itself to its requirements.  
The 73M2901CE provides firmware control for a hook relay driver (RELAY) as well as interrupt support  
for a ring detect opto-coupler (RING).  
1.4 Interrupt pins  
The external interrupt sources, DTR and RING, come from dedicated input pins of the same name.  
DTR informs the 73M2901CE that the host has requested the 73M2901CE to perform a specific function.  
The function of DTR can be changed by “AT” commands (described in full in the 73M2901CE AT  
Command User Guide).  
4
Rev. 3.3  
 
 
 
 
 

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